Re: [PATCH v5 2/2] soc/tegra: pmc: Remove unnecessary memory barrier

[Thierry Reding]

On Thu, Sep 26, 2019 at 10:17:55PM +0300, Dmitry Osipenko wrote:
> The removed barrier isn't needed because writes/reads are strictly ordered
> and even if PMC had separate ports for writes, it wouldn't matter since
> the hardware logic takes into effect after triggering CPU's power-gating
> and at that point all CPU accesses are guaranteed to be completed. That
> barrier was copied from the old arch/ code during transition to the soc/
> PMC driver and even that the code structure was different back then, the
> barrier didn't have a real useful purpose from the start. Lastly, the
> tegra_pmc_writel() naturally inserts wmb() because it uses writel(),
> and thus this change doesn't actually make any difference in terms of
> interacting with hardware. Hence let's remove the barrier to clean up
> code a tad.
> 
> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
> ---
> 
> Changelog:
> 
> v5: Extended the commit's message.
> 
> v4: No changes.
> 
> v3: No changes.
> 
> v2: New patch that was added after Jon's Hunter pointing that it's better
>     not to change the barrier's placement in the code. In fact the barrier
>     is not needed at all.
> 
>  drivers/soc/tegra/pmc.c | 2 --
>  1 file changed, 2 deletions(-)

Applied to for-5.5/soc, thanks.

Thierry

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