Re: [PATCH v1 7/8] KVM: x86: Expose PEBS feature to guest

From: Peter Zijlstra
Date: Tue Oct 29 2019 - 11:05:53 EST


On Sun, Oct 27, 2019 at 07:11:16PM -0400, Luwei Kang wrote:
> Expose PEBS feature to guest by IA32_MISC_ENABLE[bit12].
> IA32_MISC_ENABLE[bit12] is Processor Event Based Sampling (PEBS)
> Unavailable (RO) flag:
> 1 = PEBS is not supported; 0 = PEBS is supported.

Why does it make sense to expose this on SVM?

> Signed-off-by: Luwei Kang <luwei.kang@xxxxxxxxx>
> ---
> arch/x86/include/asm/kvm_host.h | 1 +
> arch/x86/kvm/svm.c | 6 ++++++
> arch/x86/kvm/vmx/vmx.c | 1 +
> arch/x86/kvm/x86.c | 22 +++++++++++++++++-----
> 4 files changed, 25 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 24a0ab9..76f5fa5 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -1127,6 +1127,7 @@ struct kvm_x86_ops {
> bool (*xsaves_supported)(void);
> bool (*umip_emulated)(void);
> bool (*pt_supported)(void);
> + bool (*pebs_supported)(void);
> bool (*pdcm_supported)(void);
>
> int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 7e0a7b3..3a1bbb3 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -5975,6 +5975,11 @@ static bool svm_pt_supported(void)
> return false;
> }
>
> +static bool svm_pebs_supported(void)
> +{
> + return false;
> +}
> +
> static bool svm_pdcm_supported(void)
> {
> return false;
> @@ -7277,6 +7282,7 @@ static bool svm_apic_init_signal_blocked(struct kvm_vcpu *vcpu)
> .xsaves_supported = svm_xsaves_supported,
> .umip_emulated = svm_umip_emulated,
> .pt_supported = svm_pt_supported,
> + .pebs_supported = svm_pebs_supported,
> .pdcm_supported = svm_pdcm_supported,
>
> .set_supported_cpuid = svm_set_supported_cpuid,
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 5c4dd05..3c370a3 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -7879,6 +7879,7 @@ static __exit void hardware_unsetup(void)
> .xsaves_supported = vmx_xsaves_supported,
> .umip_emulated = vmx_umip_emulated,
> .pt_supported = vmx_pt_supported,
> + .pebs_supported = vmx_pebs_supported,
> .pdcm_supported = vmx_pdcm_supported,
>
> .request_immediate_exit = vmx_request_immediate_exit,
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 661e2bf..5f59073 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -2591,6 +2591,7 @@ static void record_steal_time(struct kvm_vcpu *vcpu)
> int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> {
> bool pr = false;
> + bool update_cpuid = false;
> u32 msr = msr_info->index;
> u64 data = msr_info->data;
>
> @@ -2671,11 +2672,17 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
> if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
> return 1;
> - vcpu->arch.ia32_misc_enable_msr = data;
> - kvm_update_cpuid(vcpu);
> - } else {
> - vcpu->arch.ia32_misc_enable_msr = data;
> + update_cpuid = true;
> }
> +
> + if (kvm_x86_ops->pebs_supported())
> + data &= ~MSR_IA32_MISC_ENABLE_PEBS;

whitespace damage

> + else
> + data |= MSR_IA32_MISC_ENABLE_PEBS;
> +
> + vcpu->arch.ia32_misc_enable_msr = data;
> + if (update_cpuid)
> + kvm_update_cpuid(vcpu);
> break;
> case MSR_IA32_SMBASE:
> if (!msr_info->host_initiated)
> @@ -2971,7 +2978,12 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
> break;
> case MSR_IA32_MISC_ENABLE:
> - msr_info->data = vcpu->arch.ia32_misc_enable_msr;
> + if (kvm_x86_ops->pebs_supported())
> + msr_info->data = (vcpu->arch.ia32_misc_enable_msr &
> + ~MSR_IA32_MISC_ENABLE_PEBS);
> + else
> + msr_info->data = (vcpu->arch.ia32_misc_enable_msr |
> + MSR_IA32_MISC_ENABLE_PEBS);

Coding style violation.

> break;
> case MSR_IA32_SMBASE:
> if (!msr_info->host_initiated)
> --
> 1.8.3.1
>