Re: [PATCH] arm64: dts: agilex: Add EDAC Device Tree

From: Dinh Nguyen
Date: Tue Nov 12 2019 - 10:12:11 EST




On 11/8/19 3:50 PM, thor.thayer@xxxxxxxxxxxxxxx wrote:
> From: Thor Thayer <thor.thayer@xxxxxxxxxxxxxxx>
>
> Add the device tree nodes required to support the Intel
> Agilex SoCFPGA EDAC framework.
>
> Signed-off-by: Thor Thayer <thor.thayer@xxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 59 +++++++++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> index f9d1b26a3384..2b3468590f30 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
> @@ -534,6 +534,65 @@
> reg = <0xf8011100 0xc0>;
> };
>
> + eccmgr {
> + compatible = "altr,socfpga-s10-ecc-manager",
> + "altr,socfpga-a10-ecc-manager";
> + altr,sysmgr-syscon = <&sysmgr>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + interrupts = <0 15 4>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + ranges;
> +
> + sdramedac {
> + compatible = "altr,sdram-edac-s10";
> + altr,sdr-syscon = <&sdr>;
> + interrupts = <16 4>;
> + };
> +
> + ocram-ecc@ff8cc000 {
> + compatible = "altr,socfpga-s10-ocram-ecc",
> + "altr,socfpga-a10-ocram-ecc";
> + reg = <0xff8cc000 0x100>;
> + altr,ecc-parent = <&ocram>;
> + interrupts = <1 4>;
> + };
> +
> + usb0-ecc@ff8c4000 {
> + compatible = "altr,socfpga-s10-usb-ecc",
> + "altr,socfpga-usb-ecc";
> + reg = <0xff8c4000 0x100>;
> + altr,ecc-parent = <&usb0>;
> + interrupts = <2 4>;
> + };
> +
> + emac0-rx-ecc@ff8c0000 {
> + compatible = "altr,socfpga-s10-eth-mac-ecc",
> + "altr,socfpga-eth-mac-ecc";
> + reg = <0xff8c0000 0x100>;
> + altr,ecc-parent = <&gmac0>;
> + interrupts = <4 4>;
> + };
> +
> + emac0-tx-ecc@ff8c0400 {
> + compatible = "altr,socfpga-s10-eth-mac-ecc",
> + "altr,socfpga-eth-mac-ecc";
> + reg = <0xff8c0400 0x100>;
> + altr,ecc-parent = <&gmac0>;
> + interrupts = <5 4>;
> + };
> +
> + sdmmca-ecc@ff8c8c00 {
> + compatible = "altr,socfpga-s10-sdmmc-ecc",
> + "altr,socfpga-sdmmc-ecc";
> + reg = <0xff8c8c00 0x100>;
> + altr,ecc-parent = <&mmc>;
> + interrupts = <14 4>,
> + <15 4>;
> + };
> + };
> +
> qspi: spi@ff8d2000 {
> compatible = "cdns,qspi-nor";
> #address-cells = <1>;
>

Applied!

Dinh