Re: [Patch v3 03/10] ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only

From: Tony Lindgren
Date: Tue Nov 12 2019 - 10:31:09 EST


* Benoit Parrot <bparrot@xxxxxx> [191112 14:25]:
> Both CAL and VIP rely on this clock domain. But CAL DPHY require
> LVDSRX_96M_GFCLK to be active. When this domain is set to HWSUP the
> LVDSRX_96M_GFCLK is on;y active when VIP1 clock is also active. If only
> CAL on DRA72x (which uses the VIP2 clkctrl) probes the CAM domain is
> enabled but the LVDSRX_96M_GFCLK is left gated. Since LVDSRX_96M_GFCLK
> is sourcing the input clock to the DPHY then actual frame capture cannot
> start as the phy are inactive.
>
> So we either have to also enabled VIP1 even if we don't intend on using
> it or we need to set the CAM domain to use SWSUP only.
>
> This patch implements the latter.

Best that Tero picks up this one too if OK:

Acked-by: Tony Lindgren <tony@xxxxxxxxxxx>