linux-next: manual merge of the generic-ioremap tree with the risc-v tree

From: Stephen Rothwell
Date: Mon Nov 18 2019 - 01:45:16 EST

Hi all,

Today's linux-next merge of the generic-ioremap tree got a conflict in:


between commit:

0c3ac28931d5 ("riscv: separate MMIO functions into their own header file")

from the risc-v tree and commits:

d092a8707326 ("arch: rely on asm-generic/io.h for default ioremap_* definitions")
38af57825313 ("riscv: use the generic ioremap code")

from the generic-ioremap tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

From: Stephen Rothwell <sfr@xxxxxxxxxxxxxxxx>
Date: Mon, 18 Nov 2019 17:42:04 +1100
Subject: [PATCH] fixup for moved code in riscv

Signed-off-by: Stephen Rothwell <sfr@xxxxxxxxxxxxxxxx>
arch/riscv/include/asm/mmio.h | 15 +--------------
1 file changed, 1 insertion(+), 14 deletions(-)

diff --git a/arch/riscv/include/asm/mmio.h b/arch/riscv/include/asm/mmio.h
index a297a835e402..a2c809df2733 100644
--- a/arch/riscv/include/asm/mmio.h
+++ b/arch/riscv/include/asm/mmio.h
@@ -14,20 +14,7 @@
#include <linux/types.h>
#include <asm/mmiowb.h>

-#ifdef CONFIG_MMU
-void __iomem *ioremap(phys_addr_t offset, unsigned long size);
- * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't
- * change the properties of memory regions. This should be fixed by the
- * upcoming platform spec.
- */
-#define ioremap_nocache(addr, size) ioremap((addr), (size))
-#define ioremap_wc(addr, size) ioremap((addr), (size))
-#define ioremap_wt(addr, size) ioremap((addr), (size))
-void iounmap(volatile void __iomem *addr);
+#ifndef CONFIG_MMU
#define pgprot_noncached(x) (x)
#endif /* CONFIG_MMU */


Stephen Rothwell

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