Re: [PATCH v10 6/6] x86/split_lock: Enable split lock detection by kernel parameter

From: Andy Lutomirski
Date: Thu Nov 21 2019 - 16:22:28 EST

On Thu, Nov 21, 2019 at 12:25 PM Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
> On Thu, Nov 21, 2019 at 10:53:03AM -0800, Fenghua Yu wrote:
> > 4. Otherwise, re-calculate addr to point the 32-bit address which contains
> > the bit and operate on the bit. No split lock.
> That sounds confused, Even BT{,CRS} have a RmW size. There is no
> 'operate on the bit'.
> Specifically I hard rely on BTSL to be a 32bit RmW, see commit:
> 7aa54be29765 ("locking/qspinlock, x86: Provide liveness guarantee")

Okay, spent a bit of time trying to grok this. Are you saying that
LOCK BTSL suffices in a case where LOCK BTSB or LOCK XCHG8 would not?
On x86, all the LOCK operations are full barriers, so they should
order with adjacent normal accesses even to unrelated addresses,

I certainly understand that a *non-locked* RMW to a bit might need to
have a certain width to get the right ordering guarantees, but those
aren't affected by split-lock detection regardless.