RE: [PATCH v3 5/6] gpio: sifive: Add GPIO driver for SiFive SoCs

From: Marc Zyngier
Date: Fri Nov 29 2019 - 04:12:23 EST


On 2019-11-29 06:27, Yash Shah wrote:
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From: Linus Walleij <linus.walleij@xxxxxxxxxx>
Sent: 28 November 2019 17:50
To: Yash Shah <yash.shah@xxxxxxxxxx>
Cc: bgolaszewski@xxxxxxxxxxxx; robh+dt@xxxxxxxxxx;
mark.rutland@xxxxxxx; palmer@xxxxxxxxxxx; Paul Walmsley ( Sifive)
<paul.walmsley@xxxxxxxxxx>; aou@xxxxxxxxxxxxxxxxx; tglx@xxxxxxxxxxxxx;
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atish.patra@xxxxxxx; Sagar Kadam <sagar.kadam@xxxxxxxxxx>; linux-
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<sachin.ghadi@xxxxxxxxxx>
Subject: Re: [PATCH v3 5/6] gpio: sifive: Add GPIO driver for SiFive SoCs

On Mon, Nov 25, 2019 at 6:58 AM Yash Shah <yash.shah@xxxxxxxxxx> wrote:

> Adds the GPIO driver for SiFive RISC-V SoCs.
>
> Signed-off-by: Wesley W. Terpstra <wesley@xxxxxxxxxx>
> [Atish: Various fixes and code cleanup]
> Signed-off-by: Atish Patra <atish.patra@xxxxxxx>
> Signed-off-by: Yash Shah <yash.shah@xxxxxxxxxx>

Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx>

I suppose Marc will merge all patches into the irqchip tree as they are logically
dependent? If you want the GPIO bindings and this driver directly merged
(no deps) then I can do that as well.

Yes, the GPIO driver have logical dependency on irqchip patches. It
is best if Marc merges all the patches into the irqchip tree.

@Marc Zyngier, Are you going to merge all the patches into the irqchip tree?

I'm happy to pick this up, but that's definitely 5.6 material as
I stopped collecting new 5.5 features a couple of weeks ago.

Thanks,

M.
--
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