Re: [PATCH v3 4/7] PCI: brcmstb: add Broadcom STB PCIe host controller driver

[Robin Murphy]

On 03/12/2019 4:31 pm, Jeremy Linton wrote:
> Hi,
>
> On 11/26/19 3:19 AM, Nicolas Saenz Julienne wrote:
> > From: Jim Quinlan <james.quinlan@xxxxxxxxxxxx>
> >
> > This adds a basic driver for Broadcom's STB PCIe controller, for now
> > aimed at Raspberry Pi 4's SoC, bcm2711.
> >
> > Signed-off-by: Jim Quinlan <james.quinlan@xxxxxxxxxxxx>
> > Co-developed-by: Nicolas Saenz Julienne <nsaenzjulienne@xxxxxxx>
> > Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@xxxxxxx>
> >
> > ---
> >
> > Changes since v2:
> > ÂÂ - Correct rc_bar2_offset sign
> > ÂÂ - Invert IRQ clear and masking in setup code
> > ÂÂ - Use bitfield.h, redo all register ops while keeping the register
> > ÂÂÂÂ names intact
> > ÂÂ - Remove all SHIFT register definitions
> > ÂÂ - Get rid of all _RB writes
> > ÂÂ - Get rid of of_data
> > ÂÂ - Don't iterate over inexisting dma-ranges
> > ÂÂ - Add comment regarding dma-ranges validation
> > ÂÂ - Small cosmetic cleanups
> > ÂÂ - Fix license mismatch
> > ÂÂ - Set driver Kconfig tristate
> > ÂÂ - Didn't add any comment about the controller not being I/O coherent
> > ÂÂÂÂ for now as I wait for Jeremy's reply
>
> I guess its fine.. In answer to the original query. It seems that this 
> PCIe bridge requires explicit cache operations for DMA from PCIe 
> endpoints. This wasn't obvious to me at first reading because I was 
> assuming the custom DMA ops were strictly to deal with the stated DMA 
> limits.

FWIW, although it might seem anathema to server folks, non-coherent PCI 
is the overwhelming norm in embedded SoCs. Either way, provided the 
presence or absence of coherency is correctly described via the DT 
"dma-coherent" or ACPI _CCA property, then it's transparently handled by 
the DMA API for the endpoint drivers and irrelevant to the host bridge 
itself - after all, in principle the exact same root complex IP could be 
integrated both coherently and non-coherently in different SoCs.

Robin.

> So if you end up respinning, it still might be worthy mentioning 
> somewhere that this is a non-coherent PCIe implementation. I still hold 
> much of my original reservations about pieces of this driver. 
> Particularly, how it might look if someone wanted to boot the RPi using 
> ACPI on linux. But, I was shown a clever bit of AML recently, which 
> solves those problems for the RPi and the attached XHCI.
>
> So, given how much time I've looked at the root port configuration/etc 
> sections of this driver and I've not found a serious bug:
>
> Reviewed-by: Jeremy Linton <jeremy.linton@xxxxxxx>
>
> > Changes since v1:
> > ÂÂ - Fix Kconfig
> > ÂÂ - Remove pci domain check
> > ÂÂ - Remove all MSI related code
> > ÂÂ - Remove supend/resume code
> > ÂÂ - Simplify link state wait routine
> > ÂÂ - Prefix all functions
> > ÂÂ - Use of_device_get_match_data()
> > ÂÂ - Use devm_clk_get_optional()
> > ÂÂ - Get rid of irq variable
> > ÂÂ - Use STB all over the driver
> > ÂÂ - Simplify map_bus() function
> > ÂÂ - Fix license mismatch
> > ÂÂ - Remove unused register definitions
> > ÂÂ - Small cleanups, spell errors
> >
> > This is based on Jim's original submission[1] but adapted and tailored
> > specifically to bcm2711's needs (that's the Raspberry Pi 4). Support for
> > the rest of the brcmstb family will soon follow once we get support for
> > multiple dma-ranges in dma/direct.
> >
> > [1] https://patchwork.kernel.org/patch/10605959/
> >
> > Â drivers/pci/controller/KconfigÂÂÂÂÂÂÂ |ÂÂ 8 +
> > Â drivers/pci/controller/MakefileÂÂÂÂÂÂ |ÂÂ 1 +
> > Â drivers/pci/controller/pcie-brcmstb.c | 753 ++++++++++++++++++++++++++
> > Â 3 files changed, 762 insertions(+)
> > Â create mode 100644 drivers/pci/controller/pcie-brcmstb.c
>
> Thanks,
>
>
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