Re: [PATCH v4] dt-bindings: iio: accel: add binding documentation for ADIS16240

[Mark Brown]

On Wed, Dec 04, 2019 at 07:18:15AM +0000, Ardelean, Alexandru wrote:

> One example (for spi-cpha):
>         if (of_property_read_u32(nc, "spi-cpha", &tmp) == 0) {
>                 spi->mode |= SPI_CPHA_OVERRIDE;
>                 if (tmp)
>                     spi->mode |= SPI_CPHA;

We could also do this with a separate flag saying that the wire
format is forced from DT rather than having one per setting.

> Or maybe, a more complete solution would be an "spi-mode-conv" driver.
> Similar to the fixed-factor-clock clk driver, which just does a computation
> based on values from the DT.

> To tell the truth, this would be a great idea, because we have something
> like a passive 3-wire-to-4-wire HDL converter. This requires that the
> driver be configured in 3-wire mode, the SPI controller in normal 4-wire.
> That's because the SPI framework does a validation of the supported modes
> (for the SPI controller) and invalidates what the device wants (which is
> very reasonable).

This is harder to achieve here because we don't have drivers for
random bits of the wire format...

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