[PATCH 2/3] arm64: dts: rockchip: add the gpu for px30

From: Heiko Stuebner
Date: Sun Dec 08 2019 - 09:55:49 EST


From: Heiko Stuebner <heiko.stuebner@xxxxxxxxxxxxxxxxxxxxx>

The px30 contains a Mali Bifrost gpu, so add the necessary core node
for it with interrupts and powerdomains.

Signed-off-by: Heiko Stuebner <heiko.stuebner@xxxxxxxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 9a0f77ea4a78..c31423f36192 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -210,6 +210,12 @@ map0 {
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
contribution = <4096>;
};
+
+ map1 {
+ trip = <&target>;
+ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <4096>;
+ };
};
};

@@ -924,6 +930,19 @@ emmc: dwmmc@ff390000 {
status = "disabled";
};

+ gpu: gpu@ff400000 {
+ compatible = "rockchip,px30-mali", "arm,mali-bifrost";
+ reg = <0x0 0xff400000 0x0 0x4000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&cru SCLK_GPU>;
+ #cooling-cells = <2>;
+ power-domains = <&power PX30_PD_GPU>;
+ status = "disabled";
+ };
+
vopb: vop@ff460000 {
compatible = "rockchip,px30-vop-big";
reg = <0x0 0xff460000 0x0 0xefc>;
--
2.24.0