Re: [PATCH v12 8/8] PCI/ACPI: Enable EDR support

From: Bjorn Helgaas
Date: Thu Jan 16 2020 - 17:58:27 EST


On Thu, Jan 16, 2020 at 02:24:10PM -0800, Kuppuswamy Sathyanarayanan wrote:
>
> On 1/16/20 2:10 PM, Bjorn Helgaas wrote:
> > On Sun, Jan 12, 2020 at 02:44:02PM -0800, sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx wrote:
> > > From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx>
> > >
> > > As per PCI firmware specification r3.2 Downstream Port Containment
> > > Related Enhancements ECN, sec 4.5.1, OS must implement following steps
> > > to enable/use EDR feature.
> > >
> > > 1. OS can use bit 7 of _OSC Control Field to negotiate control over
> > > Downstream Port Containment (DPC) configuration of PCIe port. After _OSC
> > > negotiation, firmware will Set this bit to grant OS control over PCIe
> > > DPC configuration and Clear it if this feature was requested and denied,
> > > or was not requested.
> > >
> > > 2. Also, if OS supports EDR, it should expose its support to BIOS by
> > > setting bit 7 of _OSC Support Field. And if OS sets bit 7 of _OSC
> > > Control Field it must also expose support for EDR by setting bit 7 of
> > > _OSC Support Field.
> > >
> > > Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> > > Cc: "Rafael J. Wysocki" <rjw@xxxxxxxxxxxxx>
> > > Cc: Len Brown <lenb@xxxxxxxxxx>
> > > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx>
> > > Acked-by: Keith Busch <keith.busch@xxxxxxxxx>
> > > Tested-by: Huong Nguyen <huong.nguyen@xxxxxxxx>
> > > Tested-by: Austin Bolen <Austin.Bolen@xxxxxxxx>
> > > ---
> > > drivers/acpi/pci_root.c | 9 +++++++++
> > > drivers/pci/pcie/portdrv_core.c | 7 +++++--
> > > drivers/pci/probe.c | 1 +
> > > include/linux/acpi.h | 6 ++++--
> > > include/linux/pci.h | 3 ++-
> > > 5 files changed, 21 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
> > > index d1e666ef3fcc..134e20474dfd 100644
> > > --- a/drivers/acpi/pci_root.c
> > > +++ b/drivers/acpi/pci_root.c
> > > @@ -131,6 +131,7 @@ static struct pci_osc_bit_struct pci_osc_support_bit[] = {
> > > { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
> > > { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
> > > { OSC_PCI_MSI_SUPPORT, "MSI" },
> > > + { OSC_PCI_EDR_SUPPORT, "EDR" },
> > > { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
> > > };
> > > @@ -141,6 +142,7 @@ static struct pci_osc_bit_struct pci_osc_control_bit[] = {
> > > { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
> > > { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
> > > { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
> > > + { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
> > > };
> > > static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
> > > @@ -440,6 +442,8 @@ static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
> > > support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
> > > if (pci_msi_enabled())
> > > support |= OSC_PCI_MSI_SUPPORT;
> > > + if (IS_ENABLED(CONFIG_PCIE_EDR))
> > > + support |= OSC_PCI_EDR_SUPPORT;
> > > decode_osc_support(root, "OS supports", support);
> > > status = acpi_pci_osc_support(root, support);
> > > @@ -487,6 +491,9 @@ static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
> > > control |= OSC_PCI_EXPRESS_AER_CONTROL;
> > > }
> > > + if (IS_ENABLED(CONFIG_PCIE_DPC))
> > > + control |= OSC_PCI_EXPRESS_DPC_CONTROL;
> > The ECN [1] says:
> >
> > If this bit is set by the OS, this indicates that it supports both
> > native OS control and firmware ownership models (i.e. Error
> > Disconnect Recover notification) of Downstream Port Containment.
> >
> > But if CONFIG_PCIE_DPC=y and CONFIG_PCIE_EDR is not set, we will set
> > OSC_PCI_EXPRESS_DPC_CONTROL even though we don't support EDR. That
> > doesn't seem to match what the spec says.
> Agreed.
> >
> > I think this needs to be something like:
> >
> > if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
> > control |= OSC_PCI_EXPRESS_DPC_CONTROL;
> Since CONFIG_PCIE_EDR has dependency on CONFIG_PCIE_DPC,
> I think we can just use IS_ENABLED(CONFIG_PCIE_EDR) here.
>
> I will fix it and send an update. You want to me to send a new
> patch set of just an update to this patch ?

I'm still working through the rest of these, so I'd suggest making
this change in your local copy but waiting to send it for a few days.
Unless there's more substantial stuff to change, I can fix this
myself.

Bjorn