Re: [PATCH v3 1/2] dt-bindings: clock: Add binding documentation for TI syscon gate clock

From: Vignesh Raghavendra
Date: Tue Feb 18 2020 - 23:09:12 EST


Hi,

On 19/02/20 8:28 am, Rob Herring wrote:
> On Sat, Feb 15, 2020 at 07:47:23PM +0530, Vignesh Raghavendra wrote:
>> Add dt bindings for TI syscon gate clock driver that is used to control
>> EHRPWM's TimeBase clock (TBCLK) on TI's AM654 SoC.
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@xxxxxx>
>> ---
>> .../bindings/clock/ti,am654-ehrpwm-tbclk.yaml | 35 +++++++++++++++++++
>> 1 file changed, 35 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml
>> new file mode 100644
>> index 000000000000..3bf954ecb803
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml
>> @@ -0,0 +1,35 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/ti,am654-ehrpwm-tbclk.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: TI syscon gate clock driver
>
> Bindings are for h/w blocks, not drivers.
>

Will drop driver from the title and commit msg

>> +
>> +maintainers:
>> + - Vignesh Raghavendra <vigneshr@xxxxxx>
>> +
>> +properties:
>> + compatible:
>> + items:
>> + - const: ti,am654-ehrpwm-tbclk
>> + - const: syscon
>
> Why is this a syscon? Are there other functions or it's just the easy
> way to get a regmap.
>

Register that has tbclk enable/disable bit also contains bits to control
other functionalities and would need to be shared. Therefore its modeled
as syscon.

Regards
Vignesh

>> +
>> + "#clock-cells":
>> + const: 1
>> +
>> + reg:
>> + maxItems: 1
>> +
>> +required:
>> + - compatible
>> + - "#clock-cells"
>> + - reg
>> +
>> +examples:
>> + - |
>> + ehrpwm_tbclk: syscon@4140 {
>> + compatible = "ti,am654-ehrpwm-tbclk", "syscon";
>> + reg = <0x4140 0x18>;
>> + #clock-cells = <1>;
>> + };
>> --
>> 2.25.0
>>

--
Regards
Vignesh