Re: [PATCH v6 5/6] MIPS: DTS: JZ4780: define node for JZ4780 efuse

From: Paul Cercueil
Date: Thu Feb 27 2020 - 09:58:20 EST


Hi Nikolaus,


Le mer., févr. 26, 2020 at 12:16, H. Nikolaus Schaller <hns@xxxxxxxxxxxxx> a écrit :
From: PrasannaKumar Muralidharan <prasannatsmkumar@xxxxxxxxx>

This patch brings support for the JZ4780 efuse. Currently it only exposes
a read only access to the entire 8K bits efuse memory and the
ethernet mac address for the davicom dm9000 chip on the CI20 board.

It also changes the nemc reg range to avoid overlap.

Tested-by: Mathieu Malaterre <malat@xxxxxxxxxx>
Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@xxxxxxxxx>
Signed-off-by: Mathieu Malaterre <malat@xxxxxxxxxx>
Signed-off-by: H. Nikolaus Schaller <hns@xxxxxxxxxxxxx>
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index f928329b034b..1e266be28096 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -358,7 +358,7 @@

nemc: nemc@13410000 {
compatible = "ingenic,jz4780-nemc";
- reg = <0x13410000 0x10000>;
+ reg = <0x13410000 0x4c>;

This is wrong, the real size of the register area is 1x15c.

#address-cells = <2>;
#size-cells = <1>;
ranges = <1 0 0x1b000000 0x1000000
@@ -373,6 +373,21 @@
status = "disabled";
};

+ efuse: efuse@134100d0 {
+ compatible = "ingenic,jz4780-efuse";
+ reg = <0x134100d0 0x2c>;
+
+ clocks = <&cgu JZ4780_CLK_AHB2>;
+ clock-names = "ahb2";

As explained in my response to the other patch, 'clock-names' can go away.

Cheers,
-Paul

+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ eth0_addr: eth-mac-addr@0x22 {
+ reg = <0x22 0x6>;
+ };
+ };
+
dma: dma@13420000 {
compatible = "ingenic,jz4780-dma";
reg = <0x13420000 0x400
--
2.23.0