LPC Bus Driver

[Luis Tanica]

Hi John,

We have this board with our own SoC, which is connected to an external CPLD (FPGA) via LPC (low pin count) bus.
I've been doing some research to see what the best way of designing the drivers for it would be, and came across the Hisilicon LPC driver stuff (which I believe you're the maintainer for).

Just a little background. Let's say our host (ARM) has a custom LPC controller. The LPC controller let's us perform reads/writes of CPLD registers via LPC bus. This CPLD is the only slave device attached to that bus and we only use it for reading/writing certain
 registers (e.g., we use it to access some system information and for resetting the ARM during reboot).

I was looking at the regmap framework and that seemed a good way to go. But then I saw the logic_pio stuff as well and now I'm not sure what the best approach would be anymore

Would kindly ask for some advice here.

Kind regards,
Luis Tanica