Re: [PATCH v28 14/22] selftests/x86: Add a selftest for SGX

[Jarkko Sakkinen]

On Wed, 2020-03-04 at 14:27 -0500, Nathaniel McCallum wrote:
> > > +xsave_area:
> > +       .fill   1, 4, 0x037F            # FCW
> > +       .fill   5, 4, 0
> > +       .fill   1, 4, 0x1F80            # MXCSR
> > +       .fill   1, 4, 0xFFFF            # MXCSR_MASK
> > +       .fill   123, 4, 0
> > +       .fill   1, 4, 0x80000000        # XCOMP_BV[63] = 1, compaction mode
> > +       .fill   12, 4, 0
> 
> I find this much more readable:

And I always aim to get things more readable. Thank you.

> xsave_area:
>         # Legacy
>         .fill   1, 4, 0x037F            # FCW
>         .fill   5, 4, 0
>         .fill   1, 4, 0x1F80            # MXCSR
>         .fill   1, 4, 0xFFFF            # MXCSR_MASK
>         .fill   60, 8, 0
> 
>         # Header
>         .fill   1, 8, 0                 # XSTATE_BV
>         .fill   1, 8, 1 << 63           # XCOMP_BV (compaction mode)
>         .fill   6, 8, 0
> 
> Also, since people are likely to copy this code for their own
> enclaves, it would be helpful to document which flags are set in FCW
> and MXCSR.

It was meant as a test program but I'd guess what you say is true
because it also might be the only alternative user space to Intel's
:-) And a great starting point if you want to do things from scratch.

Because I meant it as a smoke test program for SGX, not everything is
too well documented but given the multipurpose use for that code I'll
make the improvements that you are suggesting.

/Jarkko