Re: [PATCH v5 0/5] perf cs-etm: Fix synthesizing instruction samples

From: Arnaldo Carvalho de Melo
Date: Tue Mar 10 2020 - 07:45:11 EST


Em Tue, Mar 10, 2020 at 01:43:05PM +0800, Leo Yan escreveu:
> Hi Arnaldo,
>
> On Wed, Feb 19, 2020 at 10:18:06AM +0800, Leo Yan wrote:
> > This patch series is to address issues for synthesizing instruction
> > samples, especially when the instruction sample period is small enough,
> > the current logic cannot synthesize multiple instruction samples within
> > one instruction range packet.
> >
> > Patch 0001 is to swap packets for instruction samples, so this allow
> > option '--itrace=iNNN' can work well.
> >
> > Patch 0002 avoids to reset the last branches for every instruction
> > sample; if reset the last branches for every time generating sample, the
> > later samples in the same range packet cannot use the last branches
> > anymore.
> >
> > Patch 0003 is the fixing for handling different instruction periods,
> > especially for small sample period.
> >
> > Patch 0004 is an optimization for copying last branches; it only copies
> > last branches once if the instruction samples share the same last
> > branches.
> >
> > Patch 0005 is a minor fix for unsigned variable comparison to zero.
> >
> > This patch set has been rebased on the latest perf/core branch; and
> > verified on Juno board with below commands:
> >
> > # perf script --itrace=i2
> > # perf script --itrace=i2il16
> > # perf inject --itrace=i2il16 -i perf.data -o perf.data.new
> > # perf inject --itrace=i100il16 -i perf.data -o perf.data.new
>
> Could you pick up this patch set? I confirmed this patch set can
> cleanly apply on top of the latest mainline kernel (5.6-rc5).
>
> Or if you want me to resend this patch set, please feel free let me
> know. Thanks!

Thanks, all build tested on x86 and arm64 (with CORESIGHT=1, etc), applied.

- Arnaldo