Re: [PATCH v6 6/6] mtd: spinand: micron: Add new Micron SPI NAND devices with multiple dies

From: Boris Brezillon
Date: Wed Mar 11 2020 - 06:54:39 EST


On Mon, 9 Mar 2020 12:52:30 +0100
shiva.linuxworks@xxxxxxxxx wrote:

> From: Shivamurthy Shastri <sshivamurthy@xxxxxxxxxx>
>
> Add device table for new Micron SPI NAND devices, which have multiple
> dies.
>
> Also, enable support to select the dies.
>
> Signed-off-by: Shivamurthy Shastri <sshivamurthy@xxxxxxxxxx>

Reviewed-by: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxx>

> ---
> drivers/mtd/nand/spi/micron.c | 55 +++++++++++++++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
> index 9db1ab71fcae..f7d148aaa476 100644
> --- a/drivers/mtd/nand/spi/micron.c
> +++ b/drivers/mtd/nand/spi/micron.c
> @@ -20,6 +20,14 @@
>
> #define MICRON_CFG_CR BIT(0)
>
> +/*
> + * As per datasheet, die selection is done by the 6th bit of Die
> + * Select Register (Address 0xD0).
> + */
> +#define MICRON_DIE_SELECT_REG 0xD0
> +
> +#define MICRON_SELECT_DIE(x) ((x) << 6)
> +
> static SPINAND_OP_VARIANTS(read_cache_variants,
> SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
> SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> @@ -66,6 +74,20 @@ static const struct mtd_ooblayout_ops micron_8_ooblayout = {
> .free = micron_8_ooblayout_free,
> };
>
> +static int micron_select_target(struct spinand_device *spinand,
> + unsigned int target)
> +{
> + struct spi_mem_op op = SPINAND_SET_FEATURE_OP(MICRON_DIE_SELECT_REG,
> + spinand->scratchbuf);
> +
> + if (target > 1)
> + return -EINVAL;
> +
> + *spinand->scratchbuf = MICRON_SELECT_DIE(target);
> +
> + return spi_mem_exec_op(spinand->spimem, &op);
> +}
> +
> static int micron_8_ecc_get_status(struct spinand_device *spinand,
> u8 status)
> {
> @@ -133,6 +155,17 @@ static const struct spinand_info micron_spinand_table[] = {
> 0,
> SPINAND_ECCINFO(&micron_8_ooblayout,
> micron_8_ecc_get_status)),
> + /* M79A 4Gb 3.3V */
> + SPINAND_INFO("MT29F4G01ADAGD", 0x36,
> + NAND_MEMORG(1, 2048, 128, 64, 2048, 80, 2, 1, 2),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status),
> + SPINAND_SELECT_TARGET(micron_select_target)),
> /* M70A 4Gb 3.3V */
> SPINAND_INFO("MT29F4G01ABAFD", 0x34,
> NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
> @@ -153,6 +186,28 @@ static const struct spinand_info micron_spinand_table[] = {
> SPINAND_HAS_CR_FEAT_BIT,
> SPINAND_ECCINFO(&micron_8_ooblayout,
> micron_8_ecc_get_status)),
> + /* M70A 8Gb 3.3V */
> + SPINAND_INFO("MT29F8G01ADAFD", 0x46,
> + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_CR_FEAT_BIT,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status),
> + SPINAND_SELECT_TARGET(micron_select_target)),
> + /* M70A 8Gb 1.8V */
> + SPINAND_INFO("MT29F8G01ADBFD", 0x47,
> + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_CR_FEAT_BIT,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status),
> + SPINAND_SELECT_TARGET(micron_select_target)),
> };
>
> static int micron_spinand_detect(struct spinand_device *spinand)