Re: [PATCH 2/2] AHCI: Add support for Loongson 7A1000 SATA controller

From: Jens Axboe
Date: Thu Mar 12 2020 - 09:44:56 EST

Next message: David Hildenbrand: "Re: [PATCH v4 4/5] mm/sparse.c: add note about only VMEMMAP supporting sub-section hotplug"
Previous message: Kalle Valo: "Re: [PATCH] libertas: Use new structure for SPI transfer delays"
In reply to: Tiezhu Yang: "[PATCH 2/2] AHCI: Add support for Loongson 7A1000 SATA controller"
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

On 3/10/20 6:50 AM, Tiezhu Yang wrote:
> Loongson 7A1000 SATA controller uses BAR0 as the base address register.

Applied with the pci vendor addition for 5.7, thanks.

--
Jens Axboe

Next message: David Hildenbrand: "Re: [PATCH v4 4/5] mm/sparse.c: add note about only VMEMMAP supporting sub-section hotplug"
Previous message: Kalle Valo: "Re: [PATCH] libertas: Use new structure for SPI transfer delays"
In reply to: Tiezhu Yang: "[PATCH 2/2] AHCI: Add support for Loongson 7A1000 SATA controller"
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]