Re: [RESEND 1/2] ls1043ardb: add qe node to ls1043ardb

From: Shawn Guo
Date: Tue Apr 28 2020 - 04:56:40 EST


On Tue, Apr 14, 2020 at 11:10:28AM +0800, Qiang Zhao wrote:
> From: Zhao Qiang <qiang.zhao@xxxxxxx>
>

Please write a proper commit log.

> Signed-off-by: Zhao Qiang <qiang.zhao@xxxxxxx>

Subject should be prefixed like 'arm64: dts: ...'

> ---
> arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 16 ++++++
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 66 +++++++++++++++++++++++
> 2 files changed, 82 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> index 4223a23..96e87ba 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> @@ -96,6 +96,22 @@
> };
> };
>
> +&uqe {
> + ucc_hdlc: ucc@2000 {
> + compatible = "fsl,ucc-hdlc";
> + rx-clock-name = "clk8";
> + tx-clock-name = "clk9";
> + fsl,rx-sync-clock = "rsync_pin";
> + fsl,tx-sync-clock = "tsync_pin";
> + fsl,tx-timeslot-mask = <0xfffffffe>;
> + fsl,rx-timeslot-mask = <0xfffffffe>;
> + fsl,tdm-framer-type = "e1";
> + fsl,tdm-id = <0>;
> + fsl,siram-entry-id = <0>;
> + fsl,tdm-interface;
> + };
> +};
> +
> &duart0 {
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> index c084c7a4..a6f2b15 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> @@ -525,6 +525,72 @@
> #interrupt-cells = <2>;
> };
>
> + uqe: uqe@2400000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "qe";
> + compatible = "fsl,qe", "simple-bus";
> + ranges = <0x0 0x0 0x2400000 0x40000>;
> + reg = <0x0 0x2400000 0x0 0x480>;
> + brg-frequency = <100000000>;
> + bus-frequency = <200000000>;
> +

Drop this newline.

Shawn

> + fsl,qe-num-riscs = <1>;
> + fsl,qe-num-snums = <28>;
> +
> + qeic: qeic@80 {
> + compatible = "fsl,qe-ic";
> + reg = <0x80 0x80>;
> + #address-cells = <0>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + interrupts = <0 77 0x04 0 77 0x04>;
> + };
> +
> + si1: si@700 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,ls1043-qe-si",
> + "fsl,t1040-qe-si";
> + reg = <0x700 0x80>;
> + };
> +
> + siram1: siram@1000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,ls1043-qe-siram",
> + "fsl,t1040-qe-siram";
> + reg = <0x1000 0x800>;
> + };
> +
> + ucc@2000 {
> + cell-index = <1>;
> + reg = <0x2000 0x200>;
> + interrupts = <32>;
> + interrupt-parent = <&qeic>;
> + };
> +
> + ucc@2200 {
> + cell-index = <3>;
> + reg = <0x2200 0x200>;
> + interrupts = <34>;
> + interrupt-parent = <&qeic>;
> + };
> +
> + muram@10000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,qe-muram", "fsl,cpm-muram";
> + ranges = <0x0 0x10000 0x6000>;
> +
> + data-only@0 {
> + compatible = "fsl,qe-muram-data",
> + "fsl,cpm-muram-data";
> + reg = <0x0 0x6000>;
> + };
> + };
> + };
> +
> lpuart0: serial@2950000 {
> compatible = "fsl,ls1021a-lpuart";
> reg = <0x0 0x2950000 0x0 0x1000>;
> --
> 2.9.5
>