[RFC PATCH V2 0/7] x86/DB: protects more cpu entry data and
From: Lai Jiangshan
Date: Mon May 25 2020 - 21:42:33 EST
The patchset is based on (tag: entry-v9-the-rest, tglx-devel/x86/entry).
And it is complement of 3ea11ac991d
("x86/hw_breakpoint: Prevent data breakpoints on cpu_entry_area").
After reading the code, we can see that more data needs to be protected
against hw_breakpoint, otherwise it may cause
This patch also remove IST-shifting(patch 5-7). Because tglx work includes
debug_enter() which disables nested #DB.
Patch 5-7 depends tglx'w work only by now; they don't depends on Peter's
patchset, but this patch 6 should be discarded when they are mareged
with Peter's work.
Actually, I beg/hope Peter incorporate this V2 patchset into his patchset
which will be incorporated to tglx work. Because this V2 patchset
doesn't protect debug_idt_table and patch6 conflicts with Peter's
Changed from V1
Protect the full cpu_tlbstate structure to be sure. Suggested
Drop the last patch of the V1 because debug_idt_table is removed
in Peter's patchset.
Lai Jiangshan (7):
x86/hw_breakpoint: add within_area() to check data breakpoints
x86/hw_breakpoint: Prevent data breakpoints on direct GDT
x86/hw_breakpoint: Prevent data breakpoints on per_cpu cpu_tss_rw
x86/hw_breakpoint: Prevent data breakpoints on user_pcid_flush_mask
x86/entry: don't shift stack on #DB
x86/entry: is_debug_stack() don't check of DB1 stack
x86/entry: remove DB1 stack and DB2 hole from cpu entry area
Cc: Andy Lutomirski <luto@xxxxxxxxxx>
Cc: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
arch/x86/entry/entry_64.S | 17 --------
arch/x86/include/asm/cpu_entry_area.h | 12 ++---
arch/x86/kernel/asm-offsets_64.c | 5 ---
arch/x86/kernel/dumpstack_64.c | 10 ++---
arch/x86/kernel/hw_breakpoint.c | 63 +++++++++++++++++++++++----
arch/x86/kernel/nmi.c | 7 +--
arch/x86/mm/cpu_entry_area.c | 4 +-
7 files changed, 63 insertions(+), 55 deletions(-)