Re: [PATCH v2 5/8] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings

From: Marek Szyprowski
Date: Thu Jul 02 2020 - 16:34:23 EST

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In reply to: Krzysztof Kozlowski: "[PATCH v2 5/8] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings"
Next in thread: Krzysztof Kozlowski: "Re: [PATCH v2 5/8] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings"
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On 02.07.2020 17:51, Krzysztof Kozlowski wrote:
> There is no need to keep DMA controller nodes under AMBA bus node.
> Remove the "amba" node to fix dtschema warnings like:
>
> amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>
> Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
>
> ---
>
> Changes since v1:
> 1. Remove the bus, as suggested by Marek
> ---
> arch/arm/boot/dts/exynos3250.dtsi | 47 +++----
> arch/arm/boot/dts/exynos4.dtsi | 70 +++++-----
> .../boot/dts/exynos4210-universal_c210.dts | 2 +-
> arch/arm/boot/dts/exynos5250.dtsi | 92 ++++++-------
> arch/arm/boot/dts/exynos5410.dtsi | 46 +++----
> arch/arm/boot/dts/exynos5420.dtsi | 130 ++++++++----------
> 6 files changed, 174 insertions(+), 213 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> index 044e5da64a76..d3fb45a56527 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -418,33 +418,26 @@
> status = "disabled";
> };
>
> - amba {
> - compatible = "simple-bus";
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges;
> -
> - pdma0: pdma@12680000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12680000 0x1000>;
> - interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cmu CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@12690000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12690000 0x1000>;
> - interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cmu CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> + pdma0: pdma@12680000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12680000 0x1000>;
> + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cmu CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@12690000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12690000 0x1000>;
> + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cmu CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> };
>
> adc: adc@126c0000 {
> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
> index d2779a790ce3..a1e54449f33f 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -669,45 +669,37 @@
> status = "disabled";
> };
>
> - amba: amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - pdma0: pdma@12680000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12680000 0x1000>;
> - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@12690000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12690000 0x1000>;
> - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - mdma1: mdma@12850000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x12850000 0x1000>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> + pdma0: pdma@12680000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12680000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@12690000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12690000 0x1000>;
> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + mdma1: mdma@12850000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x12850000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> };
>
> fimd: fimd@11c00000 {
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index 02fde1a75ebd..e07aa3aa93bd 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -181,7 +181,7 @@
> };
> };
>
> -&amba {
> +&soc {

What about the alphabetical order of the labels here?

> mdma0: mdma@12840000 {
> compatible = "arm,pl330", "arm,primecell";
> reg = <0x12840000 0x1000>;
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index b6135af7ef39..e3dbe4166836 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -679,56 +679,48 @@
> samsung,pmureg-phandle = <&pmu_system_controller>;
> };
>
> - amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - pdma0: pdma@121a0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121A0000 0x1000>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@121b0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121B0000 0x1000>;
> - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - mdma0: mdma@10800000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x10800000 0x1000>;
> - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> -
> - mdma1: mdma@11c10000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x11C10000 0x1000>;
> - interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> + pdma0: pdma@121a0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121A0000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@121b0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121B0000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + mdma0: mdma@10800000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x10800000 0x1000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + };
> +
> + mdma1: mdma@11c10000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x11C10000 0x1000>;
> + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> };
>
> gsc_0: gsc@13e00000 {
> diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
> index 2eab80bf5f3a..abe75b9e39f5 100644
> --- a/arch/arm/boot/dts/exynos5410.dtsi
> +++ b/arch/arm/boot/dts/exynos5410.dtsi
> @@ -189,34 +189,26 @@
> interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> - amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - pdma0: pdma@121a0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121a0000 0x1000>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> + pdma0: pdma@121a0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121a0000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
>
> - pdma1: pdma@121b0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121b0000 0x1000>;
> - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> + pdma1: pdma@121b0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121b0000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> };
>
> audi2s0: i2s@3830000 {
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index b672080e7469..c76460b70532 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -433,76 +433,68 @@
> power-domains = <&mau_pd>;
> };
>
> - amba {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "simple-bus";
> - interrupt-parent = <&gic>;
> - ranges;
> -
> - adma: adma@3880000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x03880000 0x1000>;
> - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock_audss EXYNOS_ADMA>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <6>;
> - #dma-requests = <16>;
> - power-domains = <&mau_pd>;
> - };
> -
> - pdma0: pdma@121a0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121A0000 0x1000>;
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - pdma1: pdma@121b0000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x121B0000 0x1000>;
> - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_PDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> - };
> -
> - mdma0: mdma@10800000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x10800000 0x1000>;
> - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA0>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - };
> + adma: adma@3880000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x03880000 0x1000>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock_audss EXYNOS_ADMA>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <6>;
> + #dma-requests = <16>;
> + power-domains = <&mau_pd>;
> + };
>
> - mdma1: mdma@11c10000 {
> - compatible = "arm,pl330", "arm,primecell";
> - reg = <0x11C10000 0x1000>;
> - interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clock CLK_MDMA1>;
> - clock-names = "apb_pclk";
> - #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> - /*
> - * MDMA1 can support both secure and non-secure
> - * AXI transactions. When this is enabled in
> - * the kernel for boards that run in secure
> - * mode, we are getting imprecise external
> - * aborts causing the kernel to oops.
> - */
> - status = "disabled";
> - };
> + pdma0: pdma@121a0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121A0000 0x1000>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + pdma1: pdma@121b0000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x121B0000 0x1000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_PDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <32>;
> + };
> +
> + mdma0: mdma@10800000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x10800000 0x1000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA0>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + };
> +
> + mdma1: mdma@11c10000 {
> + compatible = "arm,pl330", "arm,primecell";
> + reg = <0x11C10000 0x1000>;
> + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clock CLK_MDMA1>;
> + clock-names = "apb_pclk";
> + #dma-cells = <1>;
> + #dma-channels = <8>;
> + #dma-requests = <1>;
> + /*
> + * MDMA1 can support both secure and non-secure
> + * AXI transactions. When this is enabled in
> + * the kernel for boards that run in secure
> + * mode, we are getting imprecise external
> + * aborts causing the kernel to oops.
> + */
> + status = "disabled";
> };
>
> i2s0: i2s@3830000 {

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

Next message: Rob Herring: "Re: [RESEND PATCH v2 06/13] dt-bindings: clock: Introduce SM8150 QCOM Graphics clock bindings"
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In reply to: Krzysztof Kozlowski: "[PATCH v2 5/8] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings"
Next in thread: Krzysztof Kozlowski: "Re: [PATCH v2 5/8] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings"
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