Re: [PATCH v1 1/2] scsi: dt-bindings: ufs: Add vcc-voltage-level for UFS

From: nguyenb
Date: Tue Sep 15 2020 - 04:25:06 EST


On 2020-09-14 21:41, Bjorn Andersson wrote:
On Tue 01 Sep 01:00 CDT 2020, Bao D. Nguyen wrote:

UFS's specifications supports a range of Vcc operating
voltage levels. Add documentation for the UFS's Vcc voltage
levels setting.

Signed-off-by: Can Guo <cang@xxxxxxxxxxxxxx>
Signed-off-by: Asutosh Das <asutoshd@xxxxxxxxxxxxxx>
Signed-off-by: Bao D. Nguyen <nguyenb@xxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt | 2 ++
1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
index 415ccdd..7257b32 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -23,6 +23,8 @@ Optional properties:
with "phys" attribute, provides phandle to UFS PHY node
- vdd-hba-supply : phandle to UFS host controller supply regulator node
- vcc-supply : phandle to VCC supply regulator node
+- vcc-voltage-level : specifies voltage levels for VCC supply.
+ Should be specified in pairs (min, max), units uV.

What exactly are these pairs representing?
The pair is the min and max Vcc voltage request to the PMIC chip.
As a result, the regulator output voltage would only be in this range.


Is this supposed to be 3 pairs of (min,max) for vcc, vcc and vccq2 to be
passed into a regulator_set_voltage() for each regulator?
Yes, that's right. I should include the other power supplies in this change as well.

Or are these some sort of "operating points" for the vcc-supply?

Regards,
Bjorn

- vccq-supply : phandle to VCCQ supply regulator node
- vccq2-supply : phandle to VCCQ2 supply regulator node
- vcc-supply-1p8 : For embedded UFS devices, valid VCC range is 1.7-1.95V
--
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