[PATCH v7 19/22] perf arm-spe: Refactor operation packet handling

From: Leo Yan
Date: Thu Nov 05 2020 - 20:44:01 EST


Defines macros for operation packet header and formats (support sub
classes for 'other', 'branch', 'load and store', etc). Uses these
macros for operation packet decoding and dumping.

Signed-off-by: Leo Yan <leo.yan@xxxxxxxxxx>
Reviewed-by: Andre Przywara <andre.przywara@xxxxxxx>
---
.../arm-spe-decoder/arm-spe-pkt-decoder.c | 26 ++++++++++---------
.../arm-spe-decoder/arm-spe-pkt-decoder.h | 23 ++++++++++++++++
2 files changed, 37 insertions(+), 12 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index a8027819018a..ea0bbf7c5aa1 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -144,7 +144,7 @@ static int arm_spe_get_op_type(const unsigned char *buf, size_t len,
struct arm_spe_pkt *packet)
{
packet->type = ARM_SPE_OP_TYPE;
- packet->index = buf[0] & 0x3;
+ packet->index = SPE_OP_PKT_HDR_CLASS(buf[0]);
return arm_spe_get_payload(buf, len, 0, packet);
}

@@ -328,31 +328,33 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
int err = 0;

switch (packet->index) {
- case 0:
+ case SPE_OP_PKT_HDR_CLASS_OTHER:
arm_spe_pkt_snprintf(&err, &buf, &buf_len,
- payload & 0x1 ? "COND-SELECT" : "INSN-OTHER");
+ payload & SPE_OP_PKT_COND ? "COND-SELECT" : "INSN-OTHER");
break;
- case 1:
+ case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC:
arm_spe_pkt_snprintf(&err, &buf, &buf_len,
payload & 0x1 ? "ST" : "LD");

- if (payload & 0x2) {
- if (payload & 0x4)
+ if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) {
+ if (payload & SPE_OP_PKT_AT)
arm_spe_pkt_snprintf(&err, &buf, &buf_len, " AT");
- if (payload & 0x8)
+ if (payload & SPE_OP_PKT_EXCL)
arm_spe_pkt_snprintf(&err, &buf, &buf_len, " EXCL");
- if (payload & 0x10)
+ if (payload & SPE_OP_PKT_AR)
arm_spe_pkt_snprintf(&err, &buf, &buf_len, " AR");
- } else if (payload & 0x4) {
+ } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) ==
+ SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) {
arm_spe_pkt_snprintf(&err, &buf, &buf_len, " SIMD-FP");
}
break;
- case 2:
+ case SPE_OP_PKT_HDR_CLASS_BR_ERET:
arm_spe_pkt_snprintf(&err, &buf, &buf_len, "B");

- if (payload & 0x1)
+ if (payload & SPE_OP_PKT_COND)
arm_spe_pkt_snprintf(&err, &buf, &buf_len, " COND");
- if (payload & 0x2)
+
+ if (SPE_OP_PKT_IS_INDIRECT_BRANCH(payload))
arm_spe_pkt_snprintf(&err, &buf, &buf_len, " IND");

break;
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 42ed4e61ede2..7032fc141ad4 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -105,6 +105,29 @@ enum arm_spe_events {
EV_EMPTY_PREDICATE = 18,
};

+/* Operation packet header */
+#define SPE_OP_PKT_HDR_CLASS(h) ((h) & GENMASK_ULL(1, 0))
+#define SPE_OP_PKT_HDR_CLASS_OTHER 0x0
+#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC 0x1
+#define SPE_OP_PKT_HDR_CLASS_BR_ERET 0x2
+
+#define SPE_OP_PKT_COND BIT(0)
+
+#define SPE_OP_PKT_LDST_SUBCLASS_GET(v) ((v) & GENMASK_ULL(7, 1))
+#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG 0x0
+#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP 0x4
+#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG 0x10
+#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG 0x30
+
+#define SPE_OP_PKT_IS_LDST_ATOMIC(v) (((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2)
+
+#define SPE_OP_PKT_AR BIT(4)
+#define SPE_OP_PKT_EXCL BIT(3)
+#define SPE_OP_PKT_AT BIT(2)
+#define SPE_OP_PKT_ST BIT(0)
+
+#define SPE_OP_PKT_IS_INDIRECT_BRANCH(v) (((v) & GENMASK_ULL(7, 1)) == 0x2)
+
const char *arm_spe_pkt_name(enum arm_spe_pkt_type);

int arm_spe_get_packet(const unsigned char *buf, size_t len,
--
2.17.1