[PATCH v1 2/4] dt-binding: ata: tegra: Add dt-binding documentation for Tegra186

From: Sowjanya Komatineni
Date: Thu Nov 05 2020 - 21:16:15 EST


This patch adds dt-bindings documentation for Tegra186 AHCI
controller.

Signed-off-by: Sowjanya Komatineni <skomatineni@xxxxxxxxxx>
---
.../devicetree/bindings/ata/nvidia,tegra-ahci.yaml | 47 ++++++++++++++++++++++
1 file changed, 47 insertions(+)

diff --git a/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml b/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
index ac20f6e..db382a0 100644
--- a/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
+++ b/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
@@ -16,6 +16,7 @@ properties:
- nvidia,tegra124-ahci
- nvidia,tegra132-ahci
- nvidia,tegra210-ahci
+ - nvidia,tegra186-ahci

reg:
minItems: 2
@@ -41,14 +42,37 @@ properties:
See ../clocks/clock-bindings.txt for details.

reset-names:
+ minItems: 2
maxItems: 3

resets:
+ minItems: 2
maxItems: 3
description:
Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.

+ iommus:
+ maxItems: 1
+ description:
+ A reference to the IOMMU. See ../iommu/iommu.txt for details.
+
+ interconnect-names:
+ items:
+ - const: dma-mem
+ - const: write
+
+ interconnects:
+ maxItems: 2
+ description:
+ Pairs of phandles and interconnect provider specififer to denote
+ the edge source and destination ports of the interconnect path.
+ See ../interconnect/interconnect.txt for details.
+
+ power-domains:
+ items:
+ - description: SAX power-domain
+
phy-names:
items:
- const: sata-0
@@ -129,6 +153,29 @@ allOf:
resets:
minItems: 3

+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - nvidia,tegra186-ahci
+ then:
+ properties:
+ reg:
+ minItems: 3
+ reset-names:
+ maxItems: 2
+ items:
+ - const: sata
+ - const: sata-cold
+ resets:
+ maxItems: 2
+ required:
+ - iommus
+ - interconnect-names
+ - interconnects
+ - power-domains
+
additionalProperties: true

examples:
--
2.7.4