Re: [PATCH 09/22] misc: xlink-pcie: lh: Add core communication logic

[Greg KH]

On Tue, Dec 01, 2020 at 02:34:58PM -0800, mgross@xxxxxxxxxxxxxxx wrote:
> From: Srikanth Thokala <srikanth.thokala@xxxxxxxxx>
> 
> Add logic to establish communication with the remote host which is through
> ring buffer management and MSI/Doorbell interrupts
> 
> Reviewed-by: Mark Gross <mgross@xxxxxxxxxxxxxxx>
> Signed-off-by: Srikanth Thokala <srikanth.thokala@xxxxxxxxx>
> ---
>  drivers/misc/xlink-pcie/local_host/Makefile |   2 +
>  drivers/misc/xlink-pcie/local_host/core.c   | 894 ++++++++++++++++++++
>  drivers/misc/xlink-pcie/local_host/core.h   | 247 ++++++
>  drivers/misc/xlink-pcie/local_host/epf.c    | 116 ++-
>  drivers/misc/xlink-pcie/local_host/epf.h    |  26 +
>  drivers/misc/xlink-pcie/local_host/util.c   | 375 ++++++++
>  drivers/misc/xlink-pcie/local_host/util.h   |  70 ++
>  drivers/misc/xlink-pcie/local_host/xpcie.h  |  65 ++
>  include/linux/xlink_drv_inf.h               |  60 ++
>  9 files changed, 1847 insertions(+), 8 deletions(-)
>  create mode 100644 drivers/misc/xlink-pcie/local_host/core.c
>  create mode 100644 drivers/misc/xlink-pcie/local_host/core.h
>  create mode 100644 drivers/misc/xlink-pcie/local_host/util.c
>  create mode 100644 drivers/misc/xlink-pcie/local_host/util.h
>  create mode 100644 include/linux/xlink_drv_inf.h
> 
> diff --git a/drivers/misc/xlink-pcie/local_host/Makefile b/drivers/misc/xlink-pcie/local_host/Makefile
> index 54fc118e2dd1..28761751d43b 100644
> --- a/drivers/misc/xlink-pcie/local_host/Makefile
> +++ b/drivers/misc/xlink-pcie/local_host/Makefile
> @@ -1,3 +1,5 @@
>  obj-$(CONFIG_XLINK_PCIE_LH_DRIVER) += mxlk_ep.o
>  mxlk_ep-objs := epf.o
>  mxlk_ep-objs += dma.o
> +mxlk_ep-objs += core.o
> +mxlk_ep-objs += util.o
> diff --git a/drivers/misc/xlink-pcie/local_host/core.c b/drivers/misc/xlink-pcie/local_host/core.c
> new file mode 100644
> index 000000000000..aecaaa783153
> --- /dev/null
> +++ b/drivers/misc/xlink-pcie/local_host/core.c
> @@ -0,0 +1,894 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*****************************************************************************
> + *
> + * Intel Keem Bay XLink PCIe Driver
> + *
> + * Copyright (C) 2020 Intel Corporation
> + *
> + ****************************************************************************/
> +
> +#include <linux/of_reserved_mem.h>
> +
> +#include "epf.h"
> +#include "core.h"
> +#include "util.h"
> +
> +static struct xpcie *global_xpcie;
> +
> +static int rx_pool_size = SZ_32M;
> +module_param(rx_pool_size, int, 0664);
> +MODULE_PARM_DESC(rx_pool_size, "receiving pool size (default 32 MiB)");
> +
> +static int tx_pool_size = SZ_32M;
> +module_param(tx_pool_size, int, 0664);
> +MODULE_PARM_DESC(tx_pool_size, "transmitting pool size (default 32 MiB)");
> +
> +static int fragment_size = XPCIE_FRAGMENT_SIZE;
> +module_param(fragment_size, int, 0664);
> +MODULE_PARM_DESC(fragment_size, "transfer descriptor size (default 128 KiB)");
> +
> +static bool tx_pool_coherent = true;
> +module_param(tx_pool_coherent, bool, 0664);
> +MODULE_PARM_DESC(tx_pool_coherent,
> +		 "transmitting pool using coherent memory (default true)");
> +
> +static bool rx_pool_coherent;
> +module_param(rx_pool_coherent, bool, 0664);
> +MODULE_PARM_DESC(rx_pool_coherent,
> +		 "receiving pool using coherent memory (default false)");

This isn't the 1990's anymore.  Please make these dynamic such that they
are never needed (the code figures out the best values), or on some
per-device basis using configfs or sysfs.

thanks,

greg k-h