RE: [PATCH Xilinx Alveo 2/8] fpga: xrt: Add UAPI header files

[Sonal Santan]

Hi Moritz,

> -----Original Message-----
> From: Moritz Fischer <mdf@xxxxxxxxxx>
> Sent: Monday, November 30, 2020 8:27 PM
> To: Sonal Santan <sonals@xxxxxxxxxx>
> Cc: linux-kernel@xxxxxxxxxxxxxxx; linux-fpga@xxxxxxxxxxxxxxx; Max Zhen
> <maxz@xxxxxxxxxx>; Lizhi Hou <lizhih@xxxxxxxxxx>; Michal Simek
> <michals@xxxxxxxxxx>; Stefano Stabellini <stefanos@xxxxxxxxxx>;
> devicetree@xxxxxxxxxxxxxxx
> Subject: Re: [PATCH Xilinx Alveo 2/8] fpga: xrt: Add UAPI header files
> 
> Hi Sonal,
> 
> On Sat, Nov 28, 2020 at 04:00:34PM -0800, Sonal Santan wrote:
> > From: Sonal Santan <sonal.santan@xxxxxxxxxx>
> >
> > Add XRT UAPI header files which describe flash layout, XRT mailbox
> > protocol, xclBin/axlf FPGA image container format and XRT management
> > physical function driver ioctl interfaces.
> >
> > flash_xrt_data.h:
> > Layout used by XRT to store private data on flash.
> >
> > mailbox_proto.h:
> > Mailbox opcodes and high level data structures representing various
> > kinds of information like sensors, clock, etc.
> >
> > mailbox_transport.h:
> > Transport protocol used by mailbox.
> >
> > xclbin.h:
> > Container format used to store compiled FPGA image which includes
> > bitstream and metadata.
> 
> Can these headers be introduced together with the code that uses them as
> logical change?
> 
> I haven't looked too closely, but it helps reviewing if you can break it into
> smaller pieces that can stand by themselves.
> 

These UAPI header files are used by multiple source files hence I wanted to get 
these reviewed separately. However if this is getting in the way, in the next 
version of the patch series I would look into arranging the files differently.

You can browse the changes here as well--
https://github.com/Xilinx/linux-xoclv2/tree/xrtv2-A

Thanks,
-Sonal

> Thanks,
> Moritz