Re: [PATCH 6/9] ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family

[Marek Szyprowski]

On 10.12.2020 22:29, Krzysztof Kozlowski wrote:
> The Samsung PMIC datasheets describe the interrupt line as active low
> with a requirement of acknowledge from the CPU.  The falling edge
> interrupt will mostly work but it's not correct.
>
> Fixes: aac4e0615341 ("ARM: dts: odroidxu3: Enable wake alarm of S2MPS11 RTC")
> Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> ---
>   arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 +-
Tested-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> index d0df560eb0db..6d690b1db099 100644
> --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> @@ -509,7 +509,7 @@ pmic@66 {
>   		samsung,s2mps11-acokb-ground;
>   
>   		interrupt-parent = <&gpx0>;
> -		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
> +		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
>   		pinctrl-names = "default";
>   		pinctrl-0 = <&s2mps11_irq>;
>   

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland