Re: [PATCH V2 1/2] dt-bindings: clk: versaclock5: Add optional load capacitance property

[Adam Ford]

On Wed, Jan 20, 2021 at 10:35 AM Luca Ceresoli <luca@xxxxxxxxxxxxxxxx> wrote:
>
> Hi Adam,
>
> On 19/01/21 22:21, Adam Ford wrote:
> > There are two registers which can set the load capacitance for
> > XTAL1 and XTAL2. These are optional registers when using an
> > external crystal.  Since XTAL1 and XTAL2 will set to the same value,
> > update the binding to support a single property called
> > xtal-load-femtofarads.
> >
> > Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
> > ---
> > V2:  No Change
> >
> > diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
> > index 2ac1131fd922..c268debe5b8d 100644
> > --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
> > +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
> > @@ -59,6 +59,12 @@ properties:
> >      minItems: 1
> >      maxItems: 2
> >
> > +  idt,xtal-load-femtofarads:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
>
> "Vendor specific properties having a standard unit suffix don't need a
> type." -- Documentation/devicetree/bindings/example-schema.yaml
>

I tried to remove the "$ref: /schemas/types.yaml#/definitions/uint32"
but when I ran the test to make the yaml files, it threw an error, so
I put it back.

adam
> Overall looks good.
>
> --
> Luca