Re: [PATCH] ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address

From: Andrew Jeffery
Date: Wed Jan 27 2021 - 18:19:57 EST

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In reply to: Konstantin Aladyshev: "[PATCH] ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address"
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On Thu, 28 Jan 2021, at 04:53, Konstantin Aladyshev wrote:
> AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
> Currently ASPEED controller snoops only 0x80 port and therefore captures
> only the lower byte of each POST code.
> Enable secondary LPC snooping address to capture the higher byte of POST
> codes.
>
> Signed-off-by: Konstantin Aladyshev <aladyshev22@xxxxxxxxx>

Reviewed-by: Andrew Jeffery <andrew@xxxxxxxx>

Next message: Stafford Horne: "Re: [PATCH] soc: litex: Properly depend on HAS_IOMEM"
Previous message: Jiri Olsa: "Re: [PATCH 1/2] perf script: Support filtering by hex address"
In reply to: Konstantin Aladyshev: "[PATCH] ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address"
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