Re: [PATCH 08/53] drm/amd/display/dc/calcs/dce_calcs: Move some large variables from the stack to the heap

[Christian König]

Hi Lee,

I'm not an expert for the DC code base, but I think that this won't work.

This function is not allowed to sleep and the structures are a bit large 
to be allocated on the heap in an atomic context.

Regards,
Christian.

Am 03.03.21 um 14:42 schrieb Lee Jones:
> Fixes the following W=1 kernel build warning(s):
>
>   drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c: In function ‘calculate_bandwidth’:
>   drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dce_calcs.c:2016:1: warning: the frame size of 1216 bytes is larger than 1024 bytes [-Wframe-larger-than=]
>
> Cc: Harry Wentland <harry.wentland@xxxxxxx>
> Cc: Leo Li <sunpeng.li@xxxxxxx>
> Cc: Alex Deucher <alexander.deucher@xxxxxxx>
> Cc: "Christian König" <christian.koenig@xxxxxxx>
> Cc: David Airlie <airlied@xxxxxxxx>
> Cc: Daniel Vetter <daniel@xxxxxxxx>
> Cc: Colin Ian King <colin.king@xxxxxxxxxxxxx>
> Cc: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx
> Signed-off-by: Lee Jones <lee.jones@xxxxxxxxxx>
> ---
>   .../gpu/drm/amd/display/dc/calcs/dce_calcs.c  | 29 ++++++++++++++++---
>   1 file changed, 25 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
> index e633f8a51edb6..4f0474a3bbcad 100644
> --- a/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
> +++ b/drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
> @@ -98,16 +98,16 @@ static void calculate_bandwidth(
>   	int32_t num_cursor_lines;
>   
>   	int32_t i, j, k;
> -	struct bw_fixed yclk[3];
> -	struct bw_fixed sclk[8];
> +	struct bw_fixed *yclk;
> +	struct bw_fixed *sclk;
>   	bool d0_underlay_enable;
>   	bool d1_underlay_enable;
>   	bool fbc_enabled;
>   	bool lpt_enabled;
>   	enum bw_defines sclk_message;
>   	enum bw_defines yclk_message;
> -	enum bw_defines tiling_mode[maximum_number_of_surfaces];
> -	enum bw_defines surface_type[maximum_number_of_surfaces];
> +	enum bw_defines *tiling_mode;
> +	enum bw_defines *surface_type;
>   	enum bw_defines voltage;
>   	enum bw_defines pipe_check;
>   	enum bw_defines hsr_check;
> @@ -122,6 +122,22 @@ static void calculate_bandwidth(
>   	int32_t number_of_displays_enabled_with_margin = 0;
>   	int32_t number_of_aligned_displays_with_no_margin = 0;
>   
> +	yclk = kcalloc(3, sizeof(*yclk), GFP_KERNEL);
> +	if (!yclk)
> +		return;
> +
> +	sclk = kcalloc(8, sizeof(*sclk), GFP_KERNEL);
> +	if (!sclk)
> +		return;
> +
> +	tiling_mode = kcalloc(maximum_number_of_surfaces, sizeof(*tiling_mode), GFP_KERNEL);
> +	if (!tiling_mode)
> +		return;
> +
> +	surface_type = kcalloc(maximum_number_of_surfaces, sizeof(*surface_type), GFP_KERNEL);
> +	if (!surface_type)
> +		return;
> +
>   	yclk[low] = vbios->low_yclk;
>   	yclk[mid] = vbios->mid_yclk;
>   	yclk[high] = vbios->high_yclk;
> @@ -2013,6 +2029,11 @@ static void calculate_bandwidth(
>   			}
>   		}
>   	}
> +
> +	kfree(tiling_mode);
> +	kfree(surface_type);
> +	kfree(yclk);
> +	kfree(sclk);
>   }
>   
>   /*******************************************************************************