Re: [PATCH v6 1/1] mfd: da9063: Support SMBus and I2C mode

[Lee Jones]

On Wed, 17 Mar 2021, Jonas Mark (BT-FIR/ENG1-Grb) wrote:

> Hi,
> 
> > > From: Hubert Streidl <hubert.streidl@xxxxxxxxxxxx>
> > >
> > > By default the PMIC DA9063 2-wire interface is SMBus compliant. This
> > > means the PMIC will automatically reset the interface when the clock
> > > signal ceases for more than the SMBus timeout of 35 ms.
> > >
> > > If the I2C driver / device is not capable of creating atomic I2C
> > > transactions, a context change can cause a ceasing of the clock signal.
> > > This can happen if for example a real-time thread is scheduled. Then
> > > the DA9063 in SMBus mode will reset the 2-wire interface. Subsequently
> > > a write message could end up in the wrong register. This could cause
> > > unpredictable system behavior.
> > >
> > > The DA9063 PMIC also supports an I2C compliant mode for the 2-wire
> > > interface. This mode does not reset the interface when the clock
> > > signal ceases. Thus the problem depicted above does not occur.
> > >
> > > This patch tests for the bus functionality "I2C_FUNC_I2C". It can
> > > reasonably be assumed that the bus cannot obey SMBus timings if this
> > > functionality is set. SMBus commands most probably are emulated in
> > > this case which is prone to the latency issue described above.
> > >
> > > This patch enables the I2C bus mode if I2C_FUNC_I2C is set or
> > > otherwise keeps the default SMBus mode.
> > >
> > > Signed-off-by: Hubert Streidl <hubert.streidl@xxxxxxxxxxxx>
> > > Signed-off-by: Mark Jonas <mark.jonas@xxxxxxxxxxxx>
> > 
> > Applied with Wolfram's RB, thanks.
> 
> Thank you very much for your support to all reviewers.

Any time.

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
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