Re: [PATCH 10/10] arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile

[Chunfeng Yun]

On Tue, 2021-03-16 at 19:14 +0800, Seiya Wang wrote:
> Add basic chip support for Mediatek MT8195
> 
> Signed-off-by: Seiya Wang <seiya.wang@xxxxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/mediatek/Makefile       |   1 +
>  arch/arm64/boot/dts/mediatek/mt8195-evb.dts |  29 ++
>  arch/arm64/boot/dts/mediatek/mt8195.dtsi    | 477 ++++++++++++++++++++++++++++
>  3 files changed, 507 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts
>  create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi
> 
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> index deba27ab7657..aee4b9715d2f 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -16,4 +16,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
>  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
>  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
>  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb
>  dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-evb.dts b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> new file mode 100644
> index 000000000000..82bb10e9a531
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-evb.dts
> @@ -0,0 +1,29 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2021 MediaTek Inc.
> + * Author: Seiya Wang <seiya.wang@xxxxxxxxxxxx>
> + */
> +/dts-v1/;
> +#include "mt8195.dtsi"
> +
> +/ {
> +	model = "MediaTek MT8195 evaluation board";
> +	compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
> +
> +	aliases {
> +		serial0 = &uart0;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:921600n8";
> +	};
> +
> +	memory@40000000 {
> +		device_type = "memory";
> +		reg = <0 0x40000000 0 0x80000000>;
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> new file mode 100644
> index 000000000000..356583fe4f03
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -0,0 +1,477 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (c) 2021 MediaTek Inc.
> + * Author: Seiya Wang <seiya.wang@xxxxxxxxxxxx>
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> +	compatible = "mediatek,mt8195";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	clocks {
> +		clk26m: oscillator0 {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <26000000>;
> +			clock-output-names = "clk26m";
> +		};
> +
> +		clk32k: oscillator1 {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <32768>;
> +			clock-output-names = "clk32k";
> +		};
> +	};
[...]
> +
> +		nor_flash: nor@1132c000 {
> +			compatible = "mediatek,mt8195-nor", "mediatek,mt8173-nor";
> +			reg = <0 0x1132c000 0 0x1000>;
> +			interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&clk26m>, <&clk26m>;
> +			clock-names = "spi", "sf";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		u3phy2: usb-phy2@11c40000 {
use t-phy instead of usb-phy2

It's better to run dtbs_check for this patch

> +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> +			clocks = <&clk26m>;
> +			clock-names = "u3phya_ref";
No need clocks for v2
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0 0x11c40000 0x700>;
> +			status = "disabled";
> +
> +			u2port2: usb2-phy2@0 {
use usb-phy instead of usb2-phy2

> +				reg = <0x0 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
I think no need disable it
it's parent node is already disabled. if enable parent node,
we also want to enable all children at the same time.

> +			};
> +		};
> +
> +		u3phy3: usb-phy3@11c50000 {
t-phy@...
> +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> +			clocks = <&clk26m>;
> +			clock-names = "u3phya_ref";
No need clocks
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0 0x11c50000 0x700>;
> +			status = "disabled";
> +
> +			u2port3: usb2-phy3@0 {
use usb-phy
> +				reg = <0x0 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +		};
> +
> +		u3phy1: usb-phy1@11e30000 {
t-phy
> +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> +			clocks = <&clk26m>;
> +			clock-names = "u3phya_ref";
remove clocks*
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0 0x11e30000 0xe00>;
> +			status = "disabled";
> +
> +			u2port1: usb2-phy1@0 {
usb-phy
> +				reg = <0x0 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +
> +			u3port1: usb3-phy1@700 {
usb-phy
> +				reg = <0x700 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +		};
> +
> +		u3phy0: usb-phy0@11e40000 {
t-phy
> +			compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v2";
> +			clocks = <&clk26m>;
> +			clock-names = "u3phya_ref";
remove clocks*
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0 0x11e40000 0xe00>;
> +			status = "disabled";
> +
> +			u2port0: usb2-phy0@0 {
usb-phy
> +				reg = <0x0 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +
> +			u3port0: usb3-phy0@700 {
usb-phy
> +				reg = <0x700 0x700>;
> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "disabled";
remove status
> +			};
> +		};
> +
> +		ufsphy: phy@11fa0000 {
usf-phy instead of phy
> +			compatible = "mediatek,mt8195-ufsphy", "mediatek,mt8183-ufsphy";
> +			reg = <0 0x11fa0000 0 0xc000>;
> +			clocks = <&clk26m>, <&clk26m>;
> +			clock-names = "unipro", "mp";
> +			#phy-cells = <0>;
disabled?

Thanks a lot

> +		};
> +	};
> +};