On Sat, Apr 17, 2021 at 8:26 PM Atish Patra <atishp@xxxxxxxxxxxxxx> wrote:
I cross checked and all the patches are reviewed-by.
On Mon, Mar 29, 2021 at 9:17 PM Palmer Dabbelt <palmer@xxxxxxxxxxx> wrote:
> On Wed, 03 Mar 2021 12:02:48 PST (-0800), Atish Patra wrote:
> > This series adds minimal support for Microchip Polar Fire Soc Icicle kit.
> > It is rebased on v5.12-rc1 and depends on clock support.
> > Only MMC and ethernet drivers are enabled via this series.
> > The idea here is to add the foundational patches so that other drivers
> > can be added to on top of this. The device tree may change based on
> > feedback on bindings of individual driver support patches.
> > This series has been tested on Qemu and Polar Fire Soc Icicle kit.
> > It depends on the updated clock-series and macb fix.
> > The series is also tested by Lewis from Microchip.
> > The series can also be found at.
> > https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4
> >  https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html
> >  https://www.spinics.net/lists/linux-clk/msg54579.html
> > Changes from v3->v4:
> > 1. Fixed few DT specific issues.
> > 2. Rebased on top of new clock driver.
> > 3. SD card functionality is verified.
> > Changes from v2->v3:
> > 1. Fixed a typo in dt binding.
> > 2. Included MAINTAINERS entry for PolarFire SoC.
> > 3. Improved the dts file by using lowercase clock names and keeping phy
> > details in board specific dts file.
> > Changes from v1->v2:
> > 1. Modified the DT to match the device tree in U-Boot.
> > 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled
> > as it allows larger storage option for linux distros.
> > Atish Patra (4):
> > RISC-V: Add Microchip PolarFire SoC kconfig option
> > dt-bindings: riscv: microchip: Add YAML documentation for the
> > PolarFire SoC
> > RISC-V: Initial DTS for Microchip ICICLE board
> > RISC-V: Enable Microchip PolarFire ICICLE SoC
> > Conor Dooley (1):
> > MAINTAINERS: add microchip polarfire soc support
> > .../devicetree/bindings/riscv/microchip.yaml | 27 ++
> > MAINTAINERS | 8 +
> > arch/riscv/Kconfig.socs | 7 +
> > arch/riscv/boot/dts/Makefile | 1 +
> > arch/riscv/boot/dts/microchip/Makefile | 2 +
> > .../microchip/microchip-mpfs-icicle-kit.dts | 72 ++++
> > .../boot/dts/microchip/microchip-mpfs.dtsi | 329 ++++++++++++++++++
> > arch/riscv/configs/defconfig | 4 +
> > 8 files changed, 450 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml
> > create mode 100644 arch/riscv/boot/dts/microchip/Makefile
> > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> I had this left in my inbox waiting for either some reviews to come in or a v2,
> but I don't see any. Did I miss something?
Sorry for the late reply. I am on vacation until May. I think I saw
all the patches have already been reviewed.
Let me know if it is not the case.
@palmer: Is it possible to take this series for 5.13 MW ?
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