[PATCH] dt-bindings: timer: Convert faraday,fttmr010 to yaml

From: Corentin Labbe
Date: Fri May 28 2021 - 14:54:15 EST


Converts timer/faraday,fttmr010.txt to yaml.

Signed-off-by: Corentin Labbe <clabbe@xxxxxxxxxxxx>
---
.../bindings/timer/faraday,fttmr010.txt | 38 --------
.../bindings/timer/faraday,fttmr010.yaml | 86 +++++++++++++++++++
2 files changed, 86 insertions(+), 38 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/timer/faraday,fttmr010.txt
create mode 100644 Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml

diff --git a/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt b/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt
deleted file mode 100644
index 3cb2f4c98d64..000000000000
--- a/Documentation/devicetree/bindings/timer/faraday,fttmr010.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-Faraday Technology timer
-
-This timer is a generic IP block from Faraday Technology, embedded in the
-Cortina Systems Gemini SoCs and other designs.
-
-Required properties:
-
-- compatible : Must be one of
- "faraday,fttmr010"
- "cortina,gemini-timer", "faraday,fttmr010"
- "moxa,moxart-timer", "faraday,fttmr010"
- "aspeed,ast2400-timer"
- "aspeed,ast2500-timer"
- "aspeed,ast2600-timer"
-
-- reg : Should contain registers location and length
-- interrupts : Should contain the three timer interrupts usually with
- flags for falling edge
-
-Optionally required properties:
-
-- clocks : a clock to provide the tick rate for "faraday,fttmr010"
-- clock-names : should be "EXTCLK" and "PCLK" for the external tick timer
- and peripheral clock respectively, for "faraday,fttmr010"
-- syscon : a phandle to the global Gemini system controller if the compatible
- type is "cortina,gemini-timer"
-
-Example:
-
-timer@43000000 {
- compatible = "faraday,fttmr010";
- reg = <0x43000000 0x1000>;
- interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */
- <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
- <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */
- clocks = <&extclk>, <&pclk>;
- clock-names = "EXTCLK", "PCLK";
-};
diff --git a/Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml b/Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml
new file mode 100644
index 000000000000..a495ea80c0fc
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/faraday,fttmr010.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: (GPL-2.0+)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/faraday,fttmr010.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Faraday Technology timer
+
+maintainers:
+ - Linus Walleij <linus.walleij@xxxxxxxxxx>
+
+description: |
+ This timer is a generic IP block from Faraday Technology, embedded in the
+ Cortina Systems Gemini SoCs and other designs.
+
+properties:
+ compatible:
+ oneOf:
+ - const: faraday,fttmr010
+ - items:
+ - const: cortina,gemini-timer
+ - const: faraday,fttmr010
+ - items:
+ - const: moxa,moxart-timer
+ - const: faraday,fttmr010
+ - const: aspeed,ast2400-timer
+ - const: aspeed,ast2500-timer
+ - const: aspeed,ast2600-timer
+
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 3
+ description: Should contain the three timer interrupts usually with flags for falling edge
+
+ clocks:
+ minItems: 2
+
+ clock-names:
+ items:
+ - const: "PCLK"
+ - const: "EXTCLK"
+
+ syscon:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ maxItems: 1
+
+if:
+ properties:
+ compatible:
+ contains:
+ items:
+ - const: cortina,gemini-timer
+ - const: faraday,fttmr010
+then:
+ required:
+ - syscon
+else:
+ properties:
+ syscon: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ timer@43000000 {
+ compatible = "faraday,fttmr010";
+ reg = <0x43000000 0x1000>;
+ interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */
+ <15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
+ <16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */
+ clocks = <&extclk>, <&pclk>;
+ clock-names = "PCLK", "EXTCLK";
+ syscon = <&syscon>;
+ };
+...
--
2.31.1