Re: [PATCH v1 3/7] PCI: New Primary to Sideband (P2SB) bridge support library

From: Andy Shevchenko
Date: Mon Jul 12 2021 - 08:12:07 EST

On Tue, Apr 06, 2021 at 03:40:01PM +0200, Henning Schild wrote:
> Am Fri, 2 Apr 2021 15:09:12 +0200
> schrieb "Enrico Weigelt, metux IT consult" <lkml@xxxxxxxxx>:
> > On 09.03.21 09:42, Henning Schild wrote:
> >
> > > The device will respond to MMIO while being hidden. I am afraid
> > > nothing stops a collision, except for the assumption that the BIOS
> > > is always right and PCI devices never get remapped. But just
> > > guessing here.
> >
> > What could go wrong if it is remapped, except that this driver would
> > write to the wrong mmio space ?
> >
> > If it's unhidden, pci-core should see it and start the usual probing,
> > right ?
> I have seen this guy exposed to Linux on coreboot machines. No issues.
> But i can imagine BIOSs that somehow make use of the device and assume
> it wont move. So we would at least need a parameter to allow keeping
> that device hidden, or "fixed" in memory.

I'm wondering if they have pin control device described in the ACPI.
If so, how in that case you prevent double initialisation?

We would need to check both: P2SB and ACPI tables. Basically if we enable P2SB
as a PCI device we may create a corresponding driver (somewhere under
drivers/pci or PDx86) and check in its probe that ACPI device is also present
and functional.

With Best Regards,
Andy Shevchenko