Re: [Patch v3 4/6] arm64: boot: dts: qcom: sdm45: Add support for LMh node

[Thara Gopinath]

On 7/19/21 12:33 PM, Bjorn Andersson wrote:
> On Thu 08 Jul 07:06 CDT 2021, Thara Gopinath wrote:
>
> > Add LMh nodes for cpu cluster0 and cpu cluster1. Also add interrupt
> > support in cpufreq node to capture the LMh interrupt and let the scheduler
> > know of the max frequency throttling.
>
> Just noticed, could you please drop "boot: " from $subject and add the
> missing '8', as you're resubmitting the series.

Sure..

Warm Regards
Thara
> Regards,
> Bjorn
>
> > Signed-off-by: Thara Gopinath <thara.gopinath@xxxxxxxxxx>
> > ---
> >
> > v2->v3:
> > 	- Changed the LMh low and high trip to 94500 and 95000 mC from
> > 	  74500 and 75000 mC. This was a bug that got introduced in v2.
> > v1->v2:
> > 	- Dropped dt property qcom,support-lmh as per Bjorn's review comments.
> > 	- Changed lmh compatible from generic to platform specific.
> > 	- Introduced properties specifying arm, low and high temp thresholds for LMh
> > 	  as per Daniel's suggestion.
> >
> >   arch/arm64/boot/dts/qcom/sdm845.dtsi | 26 ++++++++++++++++++++++++++
> >   1 file changed, 26 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > index 0a86fe71a66d..4da6b8f3dd7b 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > @@ -3646,6 +3646,30 @@ swm: swm@c85 {
> >   			};
> >   		};
> >   
> > +		lmh_cluster1: lmh@17d70800 {
> > +			compatible = "qcom,sdm845-lmh";
> > +			reg = <0 0x17d70800 0 0x401>;
> > +			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> > +			qcom,lmh-cpu-id = <0x4>;
> > +			qcom,lmh-temperature-arm = <65000>;
> > +			qcom,lmh-temperature-low = <94500>;
> > +			qcom,lmh-temperature-high = <95000>;
> > +			interrupt-controller;
> > +			#interrupt-cells = <1>;
> > +		};
> > +
> > +		lmh_cluster0: lmh@17d78800 {
> > +			compatible = "qcom,sdm845-lmh";
> > +			reg = <0 0x17d78800 0 0x401>;
> > +			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> > +			qcom,lmh-cpu-id = <0x0>;
> > +			qcom,lmh-temperature-arm = <65000>;
> > +			qcom,lmh-temperature-low = <94500>;
> > +			qcom,lmh-temperature-high = <95000>;
> > +			interrupt-controller;
> > +			#interrupt-cells = <1>;
> > +		};
> > +
> >   		sound: sound {
> >   		};
> >   
> > @@ -4911,6 +4935,8 @@ cpufreq_hw: cpufreq@17d43000 {
> >   			reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>;
> >   			reg-names = "freq-domain0", "freq-domain1";
> >   
> > +			interrupts-extended = <&lmh_cluster0 0>, <&lmh_cluster1 0>;
> > +
> >   			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
> >   			clock-names = "xo", "alternate";
> >   
> > --
> > 2.25.1