Re: [PATCH V3] mtd: rawnand: qcom: Update code word value for raw read

From: mdalam
Date: Thu Sep 02 2021 - 01:54:06 EST

On 2021-09-01 20:06, Miquel Raynal wrote:
Md Sadre Alam <mdalam@xxxxxxxxxxxxxx> wrote on Wed, 1 Sep 2021
16:23:33 +0530:

Fixes: 503ee5aa ("mtd: rawnand: qcom: update last code word register")
Cc: stable@xxxxxxxxxx
Signed-off-by: Md Sadre Alam <mdalam@xxxxxxxxxxxxxx>
* Added Fixes tag
* Removed change log from commit message.

From QPIC V2 onwards there is a separate register to read

qcom_nandc_read_cw_raw() is used to read only one code word
at a time. If we will configure number of code words to 1 in
in QPIC_NAND_DEV0_CFG0 register then QPIC controller thinks
its reading the last code word, since from QPIC V2 onwards
we are having separate register to read the last code word,
we have to configure "QPIC_NAND_READ_LOCATION_LAST_CW_n"
register to fetch data from controller buffer to system


It's not your first contribution, you know what a changelog is and what
a commit message is, right? So please, keep the commit message
("why" your change is needed) where it was and only put
the changelog (the differences between two versions) below the three
dashes '---'.

Sorry for misinterpreting your comments.

I have addressed your comment in patch V4

drivers/mtd/nand/raw/qcom_nandc.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index ef0bade..04e6f7b 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -1676,13 +1676,17 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
struct nand_ecc_ctrl *ecc = &chip->ecc;
int data_size1, data_size2, oob_size1, oob_size2;
int ret, reg_off = FLASH_BUF_ACC, read_loc = 0;
+ int raw_cw = cw;

nand_read_page_op(chip, page, 0, NULL, 0);
host->use_ecc = false;

+ if (nandc->props->qpic_v2)
+ raw_cw = ecc->steps - 1;
set_address(host, host->cw_size * cw, page);
- update_rw_regs(host, 1, true, cw);
+ update_rw_regs(host, 1, true, raw_cw);

data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
@@ -1711,7 +1715,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
nandc_set_read_loc(chip, cw, 3, read_loc, oob_size2, 1);

- config_nand_cw_read(chip, false, cw);
+ config_nand_cw_read(chip, false, raw_cw);

read_data_dma(nandc, reg_off, data_buf, data_size1, 0);
reg_off += data_size1;