Re: [PATCH V2 1/2] dt-bindings: update riscv plic compatible string

From: Heiko Stübner
Date: Tue Oct 12 2021 - 11:41:45 EST


Hi,

Am Dienstag, 12. Oktober 2021, 17:34:31 CEST schrieb guoren@xxxxxxxxxx:
> From: Guo Ren <guoren@xxxxxxxxxxxxxxxxx>
>
> Add the compatible string "thead,c9xx-plic" to the riscv plic
> bindings to support SOCs with thead,c9xx processor cores.
>
> Signed-off-by: Guo Ren <guoren@xxxxxxxxxxxxxxxxx>
> Cc: Rob Herring <robh@xxxxxxxxxx>
> Cc: Palmer Dabbelt <palmerdabbelt@xxxxxxxxxx>
> Cc: Anup Patel <anup@xxxxxxxxxxxxxx>
> Cc: Atish Patra <atish.patra@xxxxxxx>
> ---
> .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> index 08d5a57ce00f..202eb7666f9b 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml
> @@ -46,6 +46,7 @@ properties:
> - enum:
> - sifive,fu540-c000-plic
> - canaan,k210-plic
> + - thead,c9xx-plic

Devicetree bindings shouldn't use asterisks (the xx-part).
Instead you want (probably)

+ - thead,c906-plic
+ - thead,c910-plic

to name the specific SoCs that plic is used on


Heiko

> - const: sifive,plic-1.0.0
>
> reg:
>