Re: [PATCH 02/22] PCI: Unify PCI error response checking

[Bjorn Helgaas]

On Wed, Oct 13, 2021 at 04:47:43PM -0500, Rob Herring wrote:

> Presumably, there could be some register somewhere where all 1s is
> valid? So I think we need the error values.

We have to assume ~0 is a valid value for any config registers except
the few defined by the spec that have bits required to be 0.  There
can be all kinds of vendor-defined stuff in config space that can be
anything.

> Also, I seem to recall only the vendor/device IDs are defined to be
> all 1s for non-existent devices. Other errors are undefined?

I think this case is actually an instance of the PCI controller
fabricating ~0 because a PCI/PCIe error occurred (I think on PCI it's
a Master Abort when nothing responds; on PCIe the read terminates as
an Unsupported Request (PCIe r5.0, sec 2.3.2)).