Re: [PATCH v8 15/15] KVM: x86/cpuid: Advise Arch LBR feature in CPUID

[Yang Weijiang]

On Fri, Oct 15, 2021 at 12:01:22AM +0000, Sean Christopherson wrote:
> s/Advise/Advertise
> 
> On Tue, Aug 24, 2021, Yang Weijiang wrote:
> > Add Arch LBR feature bit in CPU cap-mask to expose the feature.
> > Only max LBR depth is supported for guest, and it's consistent
> > with host Arch LBR settings.
> > 
> > Co-developed-by: Like Xu <like.xu@xxxxxxxxxxxxxxx>
> > Signed-off-by: Like Xu <like.xu@xxxxxxxxxxxxxxx>
> > Signed-off-by: Yang Weijiang <weijiang.yang@xxxxxxxxx>
> > ---
> >  arch/x86/kvm/cpuid.c | 33 ++++++++++++++++++++++++++++++++-
> >  1 file changed, 32 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> > index 03025eea1524..d98ebefd5d72 100644
> > --- a/arch/x86/kvm/cpuid.c
> > +++ b/arch/x86/kvm/cpuid.c
> > @@ -88,6 +88,16 @@ static int kvm_check_cpuid(struct kvm_cpuid_entry2 *entries, int nent)
> >  		if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
> >  			return -EINVAL;
> >  	}
> > +	best = cpuid_entry2_find(entries, nent, 0x1c, 0);
> > +	if (best) {
> > +		unsigned int eax, ebx, ecx, edx;
> > +
> > +		/* Reject user-space CPUID if depth is different from host's.*/
> 
> Why disallow this?  I don't see why it would be illegal for userspace to specify
> fewer LBRs, and KVM should darn well verify that any MSRs it's exposing to the
> guest actually exist.
Hi, Sean,
Thanks for the comments!
The treatment for LBR depth is a bit special, only the host value can be
supported now, i.e., 32. If userspace set the value other that 32, would like
to notify it as early as possible.
Do you want to remove the check here and correct the invalid setting silently when
guest is querying CPUID?

> 
> > +		cpuid_count(0x1c, 0, &eax, &ebx, &ecx, &edx);
> > +
> > +		if ((best->eax & 0xff) != BIT(fls(eax & 0xff) - 1))
> > +			return -EINVAL;
> > +	}
> >  
> >  	return 0;
> >  }