linux-next: manual merge of the pinctrl tree with the mfd tree

From: Stephen Rothwell
Date: Fri Oct 15 2021 - 02:06:15 EST


Hi all,

Today's linux-next merge of the pinctrl tree got a conflict in:

Documentation/devicetree/bindings/mfd/brcm,cru.yaml

between commits:

de80ebd88b9e ("dt-bindings: mfd: brcm,cru: Add clkset syscon")
dcc24e936da2 ("dt-bindings: mfd: brcm,cru: Add USB 2.0 PHY")

from the mfd tree and commit:

0398adaec341 ("Revert "dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon"")

from the pinctrl tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

--
Cheers,
Stephen Rothwell

diff --cc Documentation/devicetree/bindings/mfd/brcm,cru.yaml
index 262284ae80f1,28ac60acf4ac..000000000000
--- a/Documentation/devicetree/bindings/mfd/brcm,cru.yaml
+++ b/Documentation/devicetree/bindings/mfd/brcm,cru.yaml
@@@ -39,12 -36,9 +36,15 @@@ patternProperties
'^clock-controller@[a-f0-9]+$':
$ref: ../clock/brcm,iproc-clocks.yaml

+ '^phy@[a-f0-9]+$':
+ $ref: ../phy/bcm-ns-usb2-phy.yaml
+
+ '^pin-controller@[a-f0-9]+$':
+ $ref: ../pinctrl/brcm,ns-pinmux.yaml
+
+ '^syscon@[a-f0-9]+$':
+ $ref: syscon.yaml
+
'^thermal@[a-f0-9]+$':
$ref: ../thermal/brcm,ns-thermal.yaml

@@@ -80,23 -73,10 +80,24 @@@ examples
"iprocfast", "sata1", "sata2";
};

+ phy@164 {
+ compatible = "brcm,ns-usb2-phy";
+ reg = <0x164 0x4>;
+ brcm,syscon-clkset = <&clkset>;
+ clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
+ clock-names = "phy-ref-clk";
+ #phy-cells = <0>;
+ };
+
+ clkset: syscon@180 {
+ compatible = "brcm,cru-clkset", "syscon";
+ reg = <0x180 0x4>;
+ };
+
- pinctrl {
+ pin-controller@1c0 {
compatible = "brcm,bcm4708-pinmux";
- offset = <0x1c0>;
+ reg = <0x1c0 0x24>;
+ reg-names = "cru_gpio_control";
};

thermal@2c0 {

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