Re: [PATCH v2] arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash

[Sergey Shtylyov]

On 22.11.2021 2:49, Lad Prabhakar wrote:

> Enable mt25qu512a flash connected to QSPI0.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v1->v2
> -> Renamed qspi_pins0 to qspi0_pins
> ---
>   .../boot/dts/renesas/rzg2l-smarc-som.dtsi     | 40 +++++++++++++++++++
>   1 file changed, 40 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> index 7e84a29dddfa..aef1b8736732 100644
> --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
> @@ -178,6 +178,18 @@
>   		line-name = "gpio_sd0_pwr_en";
>   	};
>   
> +	qspi0_pins: qspi0 {
> +		qspi0-data {
> +			pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";
> +			power-source  = <1800>;

   Hrm, sorry for more nitpicking... Why 2 spaces before =?

> +		};
> +
> +		qspi0-ctrl {
> +			pins = "QSPI0_SPCLK", "QSPI0_SSL", "QSPI_RESET#";
> +			power-source  = <1800>;

   Here as well...

> +		};
> +	};
> +
>   	/*
>   	 * SD0 device selection is XOR between GPIO_SD0_DEV_SEL and SW1[2]
>   	 * The below switch logic can be used to select the device between
[...]

MBR, Sergey