Re: [PATCH] clk: rs9: fix wrong default value for clock amplitude

From: Marek Vasut
Date: Mon Apr 15 2024 - 09:59:43 EST


On 4/15/24 2:42 PM, Catalin Popescu wrote:
According to 9FGV0241, 9FGV0441 & 9FGV0841 datasheets, the default
value for the clock amplitude is 0.8V, while the driver assumes 0.7V.

Additionally, define constants for default values for both clock
amplitude and spread spectrum and use them.

Fixes: 892e0ddea1aa ("clk: rs9: Add Renesas 9-series PCIe clock generator driver")

Signed-off-by: Catalin Popescu <catalin.popescu@xxxxxxxxxxxxxxxxxxxx>

Use git send-email -v2 next time.

Reviewed-by: Marek Vasut <marex@xxxxxxx>