True, but...
> Optimizing it away, as David suggests, would mean to replace the
> 'jmp TSS' instruction with code that explicitly saves/restores state
> without modifying CR3; it might even save some other restoration work.
> I think this change would have minimal impact on other parts of
> the kernel; the switch_to is in exactly one place (schedule), setting
> up a new task might have to change, but nothing else.
Actually, the hardware already does that optimization. If the cr3 value in the
new process is the same as the old cr3 value, the TLB's won't be flushed.
(That's from intel documentation, not actual testing. I'm lazy).
Linus