Everything I've read indicates that the Pentium will pair memory
accesses provided the low-order bits of the addresses are different. I
haven't actually timed any code, of course. :-) Thus you get to access
64 bits per cycle (two 32-bit instructions). The FPU memory
instructions aren't pairable, so they can't do any better than that.
Doesn't this apply to writes, or to writes to uncached locations?
I haven't found any other way to make the Pentium write to main memory
in 64-bit chunks without first loading into cache. If someone finds a
more conventional way, it would surely be preferable to using the
FPU. I'm not aware of anyone who has found such a way, though.
-- Robert Krawitz <rlk@tiac.net> http://www.tiac.net/users/rlk/Member of the League for Programming Freedom -- mail lpf@uunet.uu.net Tall Clubs International -- tci-request@aptinc.com or 1-800-521-2512