> Subject: Cyrix 686 cycle counter
>
> The Intel Pentium cycle counter can be read using the bytes
> 0x0f, 0x31 into edx, eax.
>
> This is a usefull instruction that I have not found in the
> cyrix 586 or 686.
>
> Is this instruction emulated in the 686?
> what happens if this instruction is executed?
>
I'm sure there is a list somewhere of the opcodes that
the Pentium executes that are not executed by the Cyrix 6x86.
The is partly on topic, since there are instructions
in the linux kernel that are target cpu specific, and
if they were executed on the wrong cpu, linux would
not perform correctly.
Look for code like "if (x86_capability & 16)"
int get_cpuinfo(char * buffer)
My pentium returns the following features
fpu vme de pse tsc msr mce cx8
the CPUID instruction on the pentium pro can return many of these
bits:
FPU FPU on Chip
VME Virtual 8086 Mode Enhancement
DE Debugging Extensions
PSE Page Size Extensions
TSC Time Stamp Counter
MSR RDMSR and WRMSR Support
PAE Physical Address Extensions
MCE Machine Check Exception
CXS CMPXCHG8B Inst.
APIC APIC on Chip
..
MTRR Mem. Type Range Req.
PGE PTE Global Bit
MCA Machine Check Arch.
CMOV Cond. Move/Cmp. Inst.
but on the Cyrix 686 only
the 'FPU on Chip' flag is set (acording to the
cyrix documentation)
Linux uses the following pentium features if available:
Time Stamp Counter
Page Size Extensions
On Wed, 27 Nov 1996, Andrew E. Mileski wrote:
> > > > Why is the Cyrix 6x86 seen as a 486 in /proc/cpuinfo?
> > > > Isn't it a Pentium-class cpu?
> > >
> > > It is only a fast 486.
> >
> > This is an inaccurate statement. Please read the Cyrix 6x86 architecture
> > handbook, available from Cyrix's web site in PDF format. Or I can bounce
> > them to you, if you prefer.
>
> If the Cyrix 6x86 is 100% software compatible, and 100% hardware
> compatible, according to Cyrix and their advocates, then why does this
> topic keep comming up? :-p
>
> If anyone wants to continue this off-topic thread in E-Mail,
> I'll be glad to play advocate for _either_ chip :-)