Re: What happened to the 4MB paging Pentium bug? (fwd)

Chai Harjo (c.harjo@student.anu.edu.au)
Thu, 28 Nov 1996 22:47:41 +1100

Alan Cox wrote:
>
> Linux writes:
> > Again, I have no hard evidence for this, but I certainly have enough
> > that it's starting to look like a real problem. Much worse than the
> > divide bug, but I doubt you'll be able to get intel to exchange your
> > CPU's..
>
> To be fair to intel the FDIV bug is the smallest of the bugs ;). Rev 5
> sounds like either B3 or C stepping. That also features a pile of
> bugs including some promising looking ones for weird crashes:
>
> o REP MOVS on the 100MHz component can copy an extra data item.
>
> That would cause hell. It only occurs in theory on multiprocessors
> and/or during very heavy snoop activity (eg heavy DMA)
>
> [fixed in C1]
>
> [The FPU fix was done in B5]
>
> As to the 4Mbyte pages, that would probably not be covered by the
> general release errata as its not officially there in the pentium anyway,
> and I suspect reporting a bug caused by using 4Mb pages wouldnt impress
> them.
>
> BTW Linus we ought if we do this properly, to disable the L1 cache
> or flush the DMA after a device DMA on the B1 stepping CPU and refuse
> to run SMP for C1 or earlier. Given the B steppings randomly lock up
> with SMP I didnt put in cover for the "may lose interrupt" and other
> B stepping bugs with SMP. Maybe we should do this and also drop 4Mb
> mode on earlier chips
>
> Does anyone know how the B1,B3,B5 .. map to the version info
> in CPUID ??
>
> Alan

I am lost :)
Could you tell me where I can get more information about this
B1, B3, B5, C1, ... ?

Thanks

Chai Harjo