>
> Hi,
>
> > My references say that bits 6 and 7 of port 0x61 are valid only if you set bits
> > 2 and 3 to one. Bit 2 controls RAM parity error and bit 3 controls IO parity. To
> > set this up, you have to say something like:
> > outb( inb_p(0x61) | 0x0C, 0x61);
>
> AFAIK bits 6 and 7 are valid even if bits 2 and 3 are not set, but in such
> cases you receive no NMI.
If bit 2 and 3 are not set (0), NMI checks are enabled so bit 6 and 7 are
valid. If bit 2 and 3 are set (1), we cannot receive an NMI caused by
memory parity or I/O CH CHK. When not set, you receive no NMI only if bit
7 of 0x70 is set (NMI interrupts disabled), and that bits are still valid.
>
> > but I didn't find this in the kernel anywhere, so your code may not do anything.
>
> The kernel should _not_ enable these bits as it would break lots of systems
> having non-parity memory.
I agree.
Ciao,
Riccardo.