Re: [PATCH-2] NMI trap revised (was Re: NMI errors in 2.0.30??) (fwd)

Richard B. Johnson (root@analogic.com)
Wed, 14 May 1997 20:30:00 -0400 (EDT)


On Tue, 13 May 1997, Gabriel Paubert wrote:

> During the NMI routine all interrupts are masked anyway, and even NMIs are
> masked until the CPU executes an IRET instruction. But the problem is
> printk...

Not true with ix86 processors. To mask non-maskable interrupts you adjust
a bit in port 0x61 (I don't have the documentation here). This is the
"keyboard" chip which is really a port/uP with built-in ROM. This
physically disconnects the NMI line to the processor. I think it is
either bit 4 or 5. Anyway non-maskable interrupts are not maskable which
means CLI and STI don't affect them. Therefore the INT bit in the flags
register (which would be restored from the stack upon an IRET) does not
affect it.

Cheers,
Dick Johnson
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Richard B. Johnson
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