> But most CPUs are not `static designs'. This means that the internal
> registers and memory need a sufficiently high clock to refresh their
> contents, cfr. refresh cycles on DRAM.
Correct. That is probably why Intel specifies a minimum clock rate for
their chips.
I just looked up the spec for the Pentium/mmx processors:
Max Bus/Core Min Bus/Core
Frequency (MHz) Frequency (MHz)
66/200 33/100
66/166 33/83
66/233 33/117
The "divide by 32 on power-save" is not allowed according to Intel
specs.
The above table is almost literally from the Intel documentation.
(I skipped the third line which says that no mmx chips run at
twice the bus speed, the (get this!) -=default=- ...)
Roger.